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authorMarek Olšák <[email protected]>2016-12-24 22:57:46 +0100
committerMarek Olšák <[email protected]>2017-01-05 18:43:23 +0100
commit9a3296bf1cf8d45349b14b31eeb0d81f8b8774fc (patch)
tree4faed51aca09cff74e2098b398379c723835e100 /src/gallium/drivers/radeon/r600_texture.c
parentd4c0ad4de8c4eeec1cc0478b12ce542e9a7faa0f (diff)
radeonsi: use SDMA for initial clearing of DCC/CMASK/HTILE on CIK-VI
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/r600_texture.c')
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 259ff36800c..cba4e7d7340 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -890,7 +890,7 @@ static void r600_texture_allocate_htile(struct r600_common_screen *rscreen,
} else {
r600_screen_clear_buffer(rscreen, &rtex->htile_buffer->b.b,
0, rtex->surface.htile_size,
- clear_value, R600_COHERENCY_NONE);
+ clear_value);
}
}
@@ -1105,7 +1105,7 @@ r600_texture_create_object(struct pipe_screen *screen,
/* Initialize the cmask to 0xCC (= compressed state). */
r600_screen_clear_buffer(rscreen, &rtex->cmask_buffer->b.b,
rtex->cmask.offset, rtex->cmask.size,
- 0xCCCCCCCC, R600_COHERENCY_NONE);
+ 0xCCCCCCCC);
}
/* Initialize DCC only if the texture is not being imported. */
@@ -1113,7 +1113,7 @@ r600_texture_create_object(struct pipe_screen *screen,
r600_screen_clear_buffer(rscreen, &rtex->resource.b.b,
rtex->dcc_offset,
rtex->surface.dcc_size,
- 0xFFFFFFFF, R600_COHERENCY_NONE);
+ 0xFFFFFFFF);
}
/* Initialize the CMASK base register value. */