diff options
author | Marek Olšák <[email protected]> | 2016-11-06 20:08:24 +0100 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2017-03-30 14:44:33 +0200 |
commit | 6d21fd51b6a46accb0320a8ceb52f11edc57e82b (patch) | |
tree | 206b2d35db510dac92467a4c16ff2f933dcb988d /src/gallium/drivers/radeon/r600_texture.c | |
parent | 2862300d9e5caeb013a456c94b1a8ec21fa894b6 (diff) |
radeonsi/gfx9: disable RB+ on Vega10
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/r600_texture.c')
-rw-r--r-- | src/gallium/drivers/radeon/r600_texture.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index ec7a325d1e7..29533799082 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -2475,12 +2475,13 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx, !(rctx->screen->debug_flags & DBG_NO_DCC_FB)) { vi_separate_dcc_try_enable(rctx, tex); - /* Stoney can't do a CMASK-based clear, so all clears are - * considered to be hypothetically slow clears, which - * is weighed when determining to enable separate DCC. + /* RB+ isn't supported with a CMASK-based clear, so all + * clears are considered to be hypothetically slow + * clears, which is weighed when determining whether to + * enable separate DCC. */ if (tex->dcc_gather_statistics && - rctx->family == CHIP_STONEY) + rctx->screen->rbplus_allowed) tex->num_slow_clears++; } @@ -2508,8 +2509,8 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx, continue; } - /* Stoney/RB+ doesn't work with CMASK fast clear. */ - if (rctx->family == CHIP_STONEY) + /* RB+ doesn't work with CMASK fast clear. */ + if (rctx->screen->rbplus_allowed) continue; /* ensure CMASK is enabled */ |