diff options
author | Kristian Høgsberg Kristensen <[email protected]> | 2015-10-08 12:25:34 -0700 |
---|---|---|
committer | Kristian Høgsberg Kristensen <[email protected]> | 2015-10-08 17:20:24 -0700 |
commit | fc2a66cfcddea34af0e93dd2221ae1fd3fdd9e87 (patch) | |
tree | 3aa60e04c953b6f25e019cfef00aecb9c11bc4fa /src/gallium/drivers/radeon/r600_query.c | |
parent | 48a87f4ba062e572a66f546997366d8896a4ecd1 (diff) | |
parent | c71f0d45e6d0081ea814fb0b16baec4e75a07bcb (diff) |
Merge ../mesa into vulkan
Diffstat (limited to 'src/gallium/drivers/radeon/r600_query.c')
-rw-r--r-- | src/gallium/drivers/radeon/r600_query.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c index deeae0a6a65..9a5402583f4 100644 --- a/src/gallium/drivers/radeon/r600_query.c +++ b/src/gallium/drivers/radeon/r600_query.c @@ -226,7 +226,7 @@ static void r600_emit_query_begin(struct r600_common_context *ctx, struct r600_q assert(0); } r600_emit_reloc(ctx, &ctx->rings.gfx, query->buffer.buf, RADEON_USAGE_WRITE, - RADEON_PRIO_MIN); + RADEON_PRIO_QUERY); if (r600_is_timer_query(query->type)) ctx->num_cs_dw_timer_queries_suspend += query->num_cs_dw; @@ -288,7 +288,7 @@ static void r600_emit_query_end(struct r600_common_context *ctx, struct r600_que assert(0); } r600_emit_reloc(ctx, &ctx->rings.gfx, query->buffer.buf, RADEON_USAGE_WRITE, - RADEON_PRIO_MIN); + RADEON_PRIO_QUERY); query->buffer.results_end += query->result_size; @@ -344,7 +344,7 @@ static void r600_emit_query_predication(struct r600_common_context *ctx, struct radeon_emit(cs, va + results_base); radeon_emit(cs, op | (((va + results_base) >> 32) & 0xFF)); r600_emit_reloc(ctx, &ctx->rings.gfx, qbuf->buf, RADEON_USAGE_READ, - RADEON_PRIO_MIN); + RADEON_PRIO_QUERY); results_base += query->result_size; /* set CONTINUE bit for all packets except the first */ @@ -990,7 +990,8 @@ void r600_query_init_backend_mask(struct r600_common_context *ctx) radeon_emit(cs, buffer->gpu_address); radeon_emit(cs, buffer->gpu_address >> 32); - r600_emit_reloc(ctx, &ctx->rings.gfx, buffer, RADEON_USAGE_WRITE, RADEON_PRIO_MIN); + r600_emit_reloc(ctx, &ctx->rings.gfx, buffer, + RADEON_USAGE_WRITE, RADEON_PRIO_QUERY); /* analyze results */ results = r600_buffer_map_sync_with_rings(ctx, buffer, PIPE_TRANSFER_READ); |