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authorMarek Olšák <[email protected]>2016-06-06 01:42:46 +0200
committerMarek Olšák <[email protected]>2016-06-08 00:22:45 +0200
commit4be46c7d9dbeaff9dede941ee6518f68ad0c5f75 (patch)
tree3bf409a894a65236bc045cb583206ac82ccd47c3 /src/gallium/drivers/radeon/r600_pipe_common.h
parentc06246501ed9c095a3fa9f8fe2a5dadd1df55271 (diff)
radeonsi: don't allocate DCC for the temporary MSAA resolve surface
Allocating it has no effect, but it adds overhead (useless DCC clear). Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/r600_pipe_common.h')
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index a9175492bfa..bb090d65d16 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -48,6 +48,7 @@
#define R600_RESOURCE_FLAG_TRANSFER (PIPE_RESOURCE_FLAG_DRV_PRIV << 0)
#define R600_RESOURCE_FLAG_FLUSHED_DEPTH (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
#define R600_RESOURCE_FLAG_FORCE_TILING (PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
+#define R600_RESOURCE_FLAG_DISABLE_DCC (PIPE_RESOURCE_FLAG_DRV_PRIV << 3)
#define R600_CONTEXT_STREAMOUT_FLUSH (1u << 0)
/* Pipeline & streamout query controls. */