diff options
author | Samuel Pitoiset <[email protected]> | 2017-01-30 12:52:56 +0100 |
---|---|---|
committer | Samuel Pitoiset <[email protected]> | 2017-01-30 14:37:00 +0100 |
commit | e2c15ea0925542bd3557a5b5872a679ebbcefacd (patch) | |
tree | f14bc8ba259e1e8f456d5ec1c8d9b105c66e3f01 /src/gallium/drivers/radeon/r600_gpu_load.c | |
parent | 0e04a078c5545d536173e50e32a0604b9abb42bc (diff) |
gallium/radeon: add new HUD queries for monitoring the CP
There are even more counters in the CP_STAT register but I think
these ones are enough for now.
v2: only read (and expose) CP_STAT on VI+
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/r600_gpu_load.c')
-rw-r--r-- | src/gallium/drivers/radeon/r600_gpu_load.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/r600_gpu_load.c b/src/gallium/drivers/radeon/r600_gpu_load.c index 058006b8261..3b491188fb1 100644 --- a/src/gallium/drivers/radeon/r600_gpu_load.c +++ b/src/gallium/drivers/radeon/r600_gpu_load.c @@ -61,6 +61,15 @@ #define SRBM_STATUS2 0x0e4c #define SDMA_BUSY(x) (((x) >> 5) & 0x1) +#define CP_STAT 0x8680 +#define PFP_BUSY(x) (((x) >> 15) & 0x1) +#define MEQ_BUSY(x) (((x) >> 16) & 0x1) +#define ME_BUSY(x) (((x) >> 17) & 0x1) +#define SURFACE_SYNC_BUSY(x) (((x) >> 21) & 0x1) +#define DMA_BUSY(x) (((x) >> 22) & 0x1) +#define SCRATCH_RAM_BUSY(x) (((x) >> 24) & 0x1) +#define CE_BUSY(x) (((x) >> 26) & 0x1) + #define UPDATE_COUNTER(field, mask) \ do { \ if (mask(value)) \ @@ -98,6 +107,19 @@ static void r600_update_mmio_counters(struct r600_common_screen *rscreen, UPDATE_COUNTER(sdma, SDMA_BUSY); } + + if (rscreen->chip_class >= VI) { + /* CP_STAT */ + rscreen->ws->read_registers(rscreen->ws, CP_STAT, 1, &value); + + UPDATE_COUNTER(pfp, PFP_BUSY); + UPDATE_COUNTER(meq, MEQ_BUSY); + UPDATE_COUNTER(me, ME_BUSY); + UPDATE_COUNTER(surf_sync, SURFACE_SYNC_BUSY); + UPDATE_COUNTER(dma, DMA_BUSY); + UPDATE_COUNTER(scratch_ram, SCRATCH_RAM_BUSY); + UPDATE_COUNTER(ce, CE_BUSY); + } } #undef UPDATE_COUNTER @@ -223,6 +245,20 @@ static unsigned busy_index_from_type(struct r600_common_screen *rscreen, return BUSY_INDEX(rscreen, cb); case R600_QUERY_GPU_SDMA_BUSY: return BUSY_INDEX(rscreen, sdma); + case R600_QUERY_GPU_PFP_BUSY: + return BUSY_INDEX(rscreen, pfp); + case R600_QUERY_GPU_MEQ_BUSY: + return BUSY_INDEX(rscreen, meq); + case R600_QUERY_GPU_ME_BUSY: + return BUSY_INDEX(rscreen, me); + case R600_QUERY_GPU_SURF_SYNC_BUSY: + return BUSY_INDEX(rscreen, surf_sync); + case R600_QUERY_GPU_DMA_BUSY: + return BUSY_INDEX(rscreen, dma); + case R600_QUERY_GPU_SCRATCH_RAM_BUSY: + return BUSY_INDEX(rscreen, scratch_ram); + case R600_QUERY_GPU_CE_BUSY: + return BUSY_INDEX(rscreen, ce); default: unreachable("invalid query type"); } |