diff options
| author | Marek Olšák <[email protected]> | 2015-06-27 14:19:41 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2015-08-06 20:44:35 +0200 |
| commit | d587742650c262dea8007474b9956fd65472f8b2 (patch) | |
| tree | f54af28fe7c28ce6d389c42c69c5c0794ce31c04 /src/gallium/drivers/radeon/r600_cs.h | |
| parent | 57245cce52d544c61f03fc966850f0f94e8118d5 (diff) | |
gallium/radeon: allow the winsys to choose the IB size
Picked from the amdgpu branch.
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/r600_cs.h')
| -rw-r--r-- | src/gallium/drivers/radeon/r600_cs.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeon/r600_cs.h b/src/gallium/drivers/radeon/r600_cs.h index d6d4c88fbf6..03a04b754d6 100644 --- a/src/gallium/drivers/radeon/r600_cs.h +++ b/src/gallium/drivers/radeon/r600_cs.h @@ -77,7 +77,7 @@ static inline void r600_emit_reloc(struct r600_common_context *rctx, static inline void r600_write_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) { assert(reg < R600_CONTEXT_REG_OFFSET); - assert(cs->cdw+2+num <= RADEON_MAX_CMDBUF_DWORDS); + assert(cs->cdw+2+num <= cs->max_dw); radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0)); radeon_emit(cs, (reg - R600_CONFIG_REG_OFFSET) >> 2); } @@ -91,7 +91,7 @@ static inline void r600_write_config_reg(struct radeon_winsys_cs *cs, unsigned r static inline void r600_write_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) { assert(reg >= R600_CONTEXT_REG_OFFSET); - assert(cs->cdw+2+num <= RADEON_MAX_CMDBUF_DWORDS); + assert(cs->cdw+2+num <= cs->max_dw); radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0)); radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2); } @@ -105,7 +105,7 @@ static inline void r600_write_context_reg(struct radeon_winsys_cs *cs, unsigned static inline void si_write_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) { assert(reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END); - assert(cs->cdw+2+num <= RADEON_MAX_CMDBUF_DWORDS); + assert(cs->cdw+2+num <= cs->max_dw); radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0)); radeon_emit(cs, (reg - SI_SH_REG_OFFSET) >> 2); } @@ -119,7 +119,7 @@ static inline void si_write_sh_reg(struct radeon_winsys_cs *cs, unsigned reg, un static inline void cik_write_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) { assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END); - assert(cs->cdw+2+num <= RADEON_MAX_CMDBUF_DWORDS); + assert(cs->cdw+2+num <= cs->max_dw); radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 0)); radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2); } |