diff options
| author | Tom Stellard <[email protected]> | 2012-07-26 08:41:00 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-07-27 17:08:09 +0000 |
| commit | ee0f0f03c6c174a160e5fb3882ec5c03cdfcd163 (patch) | |
| tree | def5f21814a5bab13df7c6343a1e96bce2bcad02 /src/gallium/drivers/radeon/SIInstructions.td | |
| parent | d4bdd09d4714ae51b9f5675f7f5c678d431061e8 (diff) | |
radeon/llvm: Fix VOPC and V_CNDMASK encoding
Diffstat (limited to 'src/gallium/drivers/radeon/SIInstructions.td')
| -rw-r--r-- | src/gallium/drivers/radeon/SIInstructions.td | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeon/SIInstructions.td b/src/gallium/drivers/radeon/SIInstructions.td index 01fb81e948e..544ef20bdd9 100644 --- a/src/gallium/drivers/radeon/SIInstructions.td +++ b/src/gallium/drivers/radeon/SIInstructions.td @@ -590,10 +590,12 @@ def S_WAITCNT : SOPP <0x0000000c, (ins i32imm:$simm16), "S_WAITCNT $simm16">; //def S_TTRACEDATA : SOPP_ <0x00000016, "S_TTRACEDATA", []>; /* XXX: No VOP3 version of this instruction yet */ -def V_CNDMASK_B32 : VOP2_Helper < - 0x00000000, VReg_32, AllReg_32, "V_CNDMASK_B32", []> { - let VDST = 0; - let Uses = [VCC]; +def V_CNDMASK_B32 : VOP2 <0x00000000, (outs VReg_32:$dst), + (ins VCCReg:$vcc, AllReg_32:$src0, VReg_32:$src1), "V_CNDMASK_B32", + [(set (i32 VReg_32:$dst), + (select VCCReg:$vcc, AllReg_32:$src0, VReg_32:$src1))] > { + + let DisableEncoding = "$vcc"; } defm V_READLANE_B32 : VOP2_32 <0x00000001, "V_READLANE_B32", []>; defm V_WRITELANE_B32 : VOP2_32 <0x00000002, "V_WRITELANE_B32", []>; |