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authorTom Stellard <[email protected]>2012-06-02 06:16:18 -0400
committerTom Stellard <[email protected]>2012-06-06 13:46:03 -0400
commit8d53ddb375d2a82860b398bc463294373c5a62b0 (patch)
tree6e1f74d18b55702ae2176631787bee290d551df1 /src/gallium/drivers/radeon/SIInstructions.td
parent17e047242e82111859eb8220369c601c79a26350 (diff)
radeon/llvm: Remove AMDIL LOADCONST* instructions
This obsoletes the R600LowerInstruction and SIPropagateImmReads passes.
Diffstat (limited to 'src/gallium/drivers/radeon/SIInstructions.td')
-rw-r--r--src/gallium/drivers/radeon/SIInstructions.td17
1 files changed, 10 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeon/SIInstructions.td b/src/gallium/drivers/radeon/SIInstructions.td
index fc8ec4a3394..4408777a5f1 100644
--- a/src/gallium/drivers/radeon/SIInstructions.td
+++ b/src/gallium/drivers/radeon/SIInstructions.td
@@ -773,22 +773,25 @@ def S_BFE_I64 : SOP2_64 <0x0000002a, "S_BFE_I64", []>;
//def S_CBRANCH_G_FORK : SOP2_ <0x0000002b, "S_CBRANCH_G_FORK", []>;
def S_ABSDIFF_I32 : SOP2_32 <0x0000002c, "S_ABSDIFF_I32", []>;
-def V_MOV_IMM : VOP1 <
+class V_MOV_IMM <Operand immType, SDNode immNode> : VOP1 <
0x1,
(outs VReg_32:$dst),
- (ins f32imm:$src0),
+ (ins immType:$src0),
"V_MOV_IMM",
- []
+ [(set VReg_32:$dst, (immNode:$src0))]
>;
+def V_MOV_IMM_I32 : V_MOV_IMM<i32imm, imm>;
+def V_MOV_IMM_F32 : V_MOV_IMM<f32imm, fpimm>;
+
def S_MOV_IMM_I32 : SOP1 <
0x3,
(outs SReg_32:$dst),
(ins i32Literal:$src0),
- "S_MOV_IMM",
- [] > {
- let neverHasSideEffects = 1;
-}
+ "S_MOV_IMM_I32",
+ [(set SReg_32:$dst, (imm:$src0))]
+>;
+
let isCodeGenOnly = 1, isPseudo = 1 in {