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authorTom Stellard <[email protected]>2012-07-10 11:15:49 -0400
committerTom Stellard <[email protected]>2012-07-11 17:47:20 +0000
commit49ae102ee346d4be6a61ebdaba6e5d5ad8469407 (patch)
tree069e17b22b82de1661c1f81cb1e08a80ec507d28 /src/gallium/drivers/radeon/SIInstructions.td
parentbbdf3af8577ca61fc54c4a1615e80940c904636e (diff)
radeon/llvm: Use multiclasses for floating point loads
The original strategy for handling floating point loads, which was to lower (f32 load) to (f32 bitcast (i32 load)) wasn't really working. The main problem was that the DAG legalizer couldn't handle replacing a node with two results (load) with a node with only one result (bitcast).
Diffstat (limited to 'src/gallium/drivers/radeon/SIInstructions.td')
-rw-r--r--src/gallium/drivers/radeon/SIInstructions.td3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/SIInstructions.td b/src/gallium/drivers/radeon/SIInstructions.td
index a96d7839fba..e832ab50447 100644
--- a/src/gallium/drivers/radeon/SIInstructions.td
+++ b/src/gallium/drivers/radeon/SIInstructions.td
@@ -358,7 +358,8 @@ def TBUFFER_LOAD_FORMAT_XYZW : MTBUF_Load_Helper <0x00000003, "TBUFFER_LOAD_FORM
//def TBUFFER_STORE_FORMAT_XYZ : MTBUF_ <0x00000006, "TBUFFER_STORE_FORMAT_XYZ", []>;
//def TBUFFER_STORE_FORMAT_XYZW : MTBUF_ <0x00000007, "TBUFFER_STORE_FORMAT_XYZW", []>;
-defm S_LOAD_DWORD : SMRD_Helper <0x00000000, "S_LOAD_DWORD", SReg_32, f32>;
+defm S_LOAD_DWORD : SMRD_32 <0x00000000, "S_LOAD_DWORD", SReg_32>;
+
//def S_LOAD_DWORDX2 : SMRD_DWORDX2 <0x00000001, "S_LOAD_DWORDX2", []>;
defm S_LOAD_DWORDX4 : SMRD_Helper <0x00000002, "S_LOAD_DWORDX4", SReg_128, v4i32>;
defm S_LOAD_DWORDX8 : SMRD_Helper <0x00000003, "S_LOAD_DWORDX8", SReg_256, v8i32>;