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authorTom Stellard <[email protected]>2012-07-10 11:15:49 -0400
committerTom Stellard <[email protected]>2012-07-11 17:47:20 +0000
commit49ae102ee346d4be6a61ebdaba6e5d5ad8469407 (patch)
tree069e17b22b82de1661c1f81cb1e08a80ec507d28 /src/gallium/drivers/radeon/SIInstrInfo.td
parentbbdf3af8577ca61fc54c4a1615e80940c904636e (diff)
radeon/llvm: Use multiclasses for floating point loads
The original strategy for handling floating point loads, which was to lower (f32 load) to (f32 bitcast (i32 load)) wasn't really working. The main problem was that the DAG legalizer couldn't handle replacing a node with two results (load) with a node with only one result (bitcast).
Diffstat (limited to 'src/gallium/drivers/radeon/SIInstrInfo.td')
-rw-r--r--src/gallium/drivers/radeon/SIInstrInfo.td5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/SIInstrInfo.td b/src/gallium/drivers/radeon/SIInstrInfo.td
index be08e8abbce..aac644369d9 100644
--- a/src/gallium/drivers/radeon/SIInstrInfo.td
+++ b/src/gallium/drivers/radeon/SIInstrInfo.td
@@ -468,5 +468,10 @@ multiclass SMRD_Helper <bits<5> op, string asm, RegisterClass dstClass,
>;
}
+multiclass SMRD_32 <bits<5> op, string asm, RegisterClass dstClass> {
+ defm _F32 : SMRD_Helper <op, asm, dstClass, f32>;
+ defm _I32 : SMRD_Helper <op, asm, dstClass, i32>;
+}
+
include "SIInstrFormats.td"
include "SIInstructions.td"