diff options
| author | Tom Stellard <[email protected]> | 2012-07-26 08:41:00 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-07-27 17:08:09 +0000 |
| commit | ee0f0f03c6c174a160e5fb3882ec5c03cdfcd163 (patch) | |
| tree | def5f21814a5bab13df7c6343a1e96bce2bcad02 /src/gallium/drivers/radeon/SIInstrInfo.td | |
| parent | d4bdd09d4714ae51b9f5675f7f5c678d431061e8 (diff) | |
radeon/llvm: Fix VOPC and V_CNDMASK encoding
Diffstat (limited to 'src/gallium/drivers/radeon/SIInstrInfo.td')
| -rw-r--r-- | src/gallium/drivers/radeon/SIInstrInfo.td | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeon/SIInstrInfo.td b/src/gallium/drivers/radeon/SIInstrInfo.td index 72f03d29315..d71df43d0a4 100644 --- a/src/gallium/drivers/radeon/SIInstrInfo.td +++ b/src/gallium/drivers/radeon/SIInstrInfo.td @@ -407,8 +407,8 @@ class VOP3 <bits<9> op, dag outs, dag ins, string asm, list<dag> pattern> : let PostEncoderMethod = "VOPPostEncode"; } -class VOPC <bits<8> op, dag outs, dag ins, string asm, list<dag> pattern> : - Enc32 <outs, ins, asm, pattern> { +class VOPC <bits<8> op, dag ins, string asm, list<dag> pattern> : + Enc32 <(outs VCCReg:$dst), ins, asm, pattern> { bits<9> SRC0; bits<8> VSRC1; @@ -420,8 +420,7 @@ class VOPC <bits<8> op, dag outs, dag ins, string asm, list<dag> pattern> : let EncodingType = 15; //SIInstrEncodingType::VOPC let PostEncoderMethod = "VOPPostEncode"; - - let Defs = [VCC]; + let DisableEncoding = "$dst"; } class MIMG_Load_Helper <bits<7> op, string asm> : MIMG < |