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authorTom Stellard <[email protected]>2012-06-05 20:10:31 -0400
committerTom Stellard <[email protected]>2012-06-06 13:46:04 -0400
commitd4942eb9fa1247053619be2b1e5a1b79f35c535d (patch)
treedbc234aba08f848d97a4be6b7b680df932fd486b /src/gallium/drivers/radeon/SIInstrInfo.h
parentedceed1b9a46c4a92a6113e8b1c5d2433568143d (diff)
radeon/llvm: Remove obselete hooks for the ConvertToISA pass
We can't remove this pass yet, because we need it to convert AMDIL registers in BRANCH* instructions, but we don't need it for instruction conversion any more.
Diffstat (limited to 'src/gallium/drivers/radeon/SIInstrInfo.h')
-rw-r--r--src/gallium/drivers/radeon/SIInstrInfo.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/gallium/drivers/radeon/SIInstrInfo.h b/src/gallium/drivers/radeon/SIInstrInfo.h
index 6cfbaf4623b..aa567b6c8ea 100644
--- a/src/gallium/drivers/radeon/SIInstrInfo.h
+++ b/src/gallium/drivers/radeon/SIInstrInfo.h
@@ -42,15 +42,6 @@ public:
/// number of bytes.
unsigned getEncodingBytes(const MachineInstr &MI) const;
- /// convertToISA - Convert the AMDIL MachineInstr to a supported SI
- ///MachineInstr
- virtual MachineInstr * convertToISA(MachineInstr & MI, MachineFunction &MF,
- DebugLoc DL) const;
-
- /// getISAOpcode - This function takes an AMDIL opcode as an argument and
- /// returns an equivalent SI opcode.
- virtual unsigned getISAOpcode(unsigned AMDILopcode) const;
-
virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
int64_t Imm) const;