radeon/llvm: Remove backend code from Mesa

This code now lives in an external tree.

For the next Mesa release fetch the code from the master branch
of this LLVM repo:
http://cgit.freedesktop.org/~tstellar/llvm/

For all subsequent Mesa releases, fetch the code from the official LLVM
project:
www.llvm.org

1 files changed, 0 insertions, 62 deletions

diff --git a/src/gallium/drivers/radeon/SIInstrInfo.h b/src/gallium/drivers/radeon/SIInstrInfo.h
deleted file mode 100644
index 5915a00f779..00000000000
--- a/src/gallium/drivers/radeon/SIInstrInfo.h
+++ /dev/null
@@ -1,62 +0,0 @@
-//===-- SIInstrInfo.h - SI Instruction Info Interface ---------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Interface definition for SIInstrInfo.
-//
-//===----------------------------------------------------------------------===//
-
-
-#ifndef SIINSTRINFO_H
-#define SIINSTRINFO_H
-
-#include "AMDGPUInstrInfo.h"
-#include "SIRegisterInfo.h"
-
-namespace llvm {
-
-class SIInstrInfo : public AMDGPUInstrInfo {
-private:
-  const SIRegisterInfo RI;
-  AMDGPUTargetMachine &TM;
-
-public:
-  explicit SIInstrInfo(AMDGPUTargetMachine &tm);
-
-  const SIRegisterInfo &getRegisterInfo() const;
-
-  virtual void copyPhysReg(MachineBasicBlock &MBB,
-                           MachineBasicBlock::iterator MI, DebugLoc DL,
-                           unsigned DestReg, unsigned SrcReg,
-                           bool KillSrc) const;
-
-  /// getEncodingType - Returns the encoding type of this instruction.  
-  unsigned getEncodingType(const MachineInstr &MI) const;
-
-  /// getEncodingBytes - Returns the size of this instructions encoding in
-  /// number of bytes.
-  unsigned getEncodingBytes(const MachineInstr &MI) const;
-
-  virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
-                                        int64_t Imm) const;
-
-  virtual unsigned getIEQOpcode() const { assert(!"Implement"); return 0;}
-  virtual bool isMov(unsigned Opcode) const;
-
-  };
-
-} // End namespace llvm
-
-namespace SIInstrFlags {
-  enum Flags {
-    // First 4 bits are the instruction encoding
-    NEED_WAIT = 1 << 4
-  };
-}
-
-#endif //SIINSTRINFO_H