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authorTom Stellard <[email protected]>2012-07-25 08:46:35 -0400
committerTom Stellard <[email protected]>2012-07-27 17:08:09 +0000
commitd4bdd09d4714ae51b9f5675f7f5c678d431061e8 (patch)
tree7fc099f503f52af85776bc4067905639bb038e69 /src/gallium/drivers/radeon/SIInstrInfo.cpp
parentfd1f19a191c648e7c6fdaac3167e900e4fed4a6d (diff)
radeon/llvm: Assert if we try to copy SCC reg
Diffstat (limited to 'src/gallium/drivers/radeon/SIInstrInfo.cpp')
-rw-r--r--src/gallium/drivers/radeon/SIInstrInfo.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/SIInstrInfo.cpp b/src/gallium/drivers/radeon/SIInstrInfo.cpp
index 4438d67f877..26f45fce417 100644
--- a/src/gallium/drivers/radeon/SIInstrInfo.cpp
+++ b/src/gallium/drivers/radeon/SIInstrInfo.cpp
@@ -38,6 +38,12 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const
{
+
+ // If we are trying to copy to or from SCC, there is a bug somewhere else in
+ // the backend. While it may be theoretically possible to do this, it should
+ // never be necessary.
+ assert(DestReg != AMDGPU::SCC && SrcReg != AMDGPU::SCC);
+
BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg)
.addReg(SrcReg, getKillRegState(KillSrc));
}