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authorTom Stellard <[email protected]>2012-05-31 20:35:18 -0400
committerTom Stellard <[email protected]>2012-06-01 11:28:11 -0400
commitd6c2d3722d795381d3cdf11fe00f63780ad0725a (patch)
tree05b75b2f5a1ac26b476d1851cc62b27fbcc5640a /src/gallium/drivers/radeon/SIInstrInfo.cpp
parent65917004d99ccb79f709e621f8f6cf66715ffdca (diff)
radeon/llvm: Eliminate CFGStructurizer dependency on AMDIL instructions
Add some hooks to the R600,SI InstrInfo and RegisterInfo classes, so that the CFGStructurizer pass can run without any relying on AMDIL instructions.
Diffstat (limited to 'src/gallium/drivers/radeon/SIInstrInfo.cpp')
-rw-r--r--src/gallium/drivers/radeon/SIInstrInfo.cpp11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/SIInstrInfo.cpp b/src/gallium/drivers/radeon/SIInstrInfo.cpp
index 4ee3e5d5f8d..cd4e227e33b 100644
--- a/src/gallium/drivers/radeon/SIInstrInfo.cpp
+++ b/src/gallium/drivers/radeon/SIInstrInfo.cpp
@@ -105,3 +105,14 @@ unsigned SIInstrInfo::getISAOpcode(unsigned AMDILopcode) const
default: return AMDILopcode;
}
}
+
+MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg,
+ int64_t Imm) const
+{
+ MachineInstr * MI = MF->CreateMachineInstr(get(AMDIL::V_MOV_IMM), DebugLoc());
+ MachineInstrBuilder(MI).addReg(DstReg, RegState::Define);
+ MachineInstrBuilder(MI).addImm(Imm);
+
+ return MI;
+
+}