diff options
| author | Tom Stellard <[email protected]> | 2012-07-26 14:30:23 +0000 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-08-15 18:35:25 +0000 |
| commit | 3aaa209293a281e103ef71e3578fad042972e092 (patch) | |
| tree | 1a7e3557ac03276cccb10ca0ab0521714ba5f530 /src/gallium/drivers/radeon/SIISelLowering.h | |
| parent | 40c41fe890e53d99afb4e2c3fbf10043081edd9e (diff) | |
radeon/llvm: Lower loads from USE_SGPR adddress space during DAG lowering
Diffstat (limited to 'src/gallium/drivers/radeon/SIISelLowering.h')
| -rw-r--r-- | src/gallium/drivers/radeon/SIISelLowering.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/SIISelLowering.h b/src/gallium/drivers/radeon/SIISelLowering.h index d5454528de2..cf655a1dce7 100644 --- a/src/gallium/drivers/radeon/SIISelLowering.h +++ b/src/gallium/drivers/radeon/SIISelLowering.h @@ -35,12 +35,11 @@ class SITargetLowering : public AMDGPUTargetLowering MachineBasicBlock::iterator I) const; void LowerSI_V_CNDLT(MachineInstr *MI, MachineBasicBlock &BB, MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const; - void lowerUSE_SGPR(MachineInstr *MI, MachineFunction * MF, - MachineRegisterInfo & MRI) const; SDValue Loweri1ContextSwitch(SDValue Op, SelectionDAG &DAG, unsigned VCCNode) const; SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const; SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; public: |