diff options
author | Tom Stellard <[email protected]> | 2012-07-26 08:41:00 -0400 |
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committer | Tom Stellard <[email protected]> | 2012-07-27 17:08:09 +0000 |
commit | ee0f0f03c6c174a160e5fb3882ec5c03cdfcd163 (patch) | |
tree | def5f21814a5bab13df7c6343a1e96bce2bcad02 /src/gallium/drivers/radeon/SIISelLowering.cpp | |
parent | d4bdd09d4714ae51b9f5675f7f5c678d431061e8 (diff) |
radeon/llvm: Fix VOPC and V_CNDMASK encoding
Diffstat (limited to 'src/gallium/drivers/radeon/SIISelLowering.cpp')
-rw-r--r-- | src/gallium/drivers/radeon/SIISelLowering.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/SIISelLowering.cpp b/src/gallium/drivers/radeon/SIISelLowering.cpp index 5ce85e1770f..591968a079d 100644 --- a/src/gallium/drivers/radeon/SIISelLowering.cpp +++ b/src/gallium/drivers/radeon/SIISelLowering.cpp @@ -179,12 +179,14 @@ void SITargetLowering::LowerSI_INTERP_CONST(MachineInstr *MI, void SITargetLowering::LowerSI_V_CNDLT(MachineInstr *MI, MachineBasicBlock &BB, MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const { - BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_CMP_LT_F32_e32)) + BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_CMP_LT_F32_e32), + AMDGPU::VCC) .addOperand(MI->getOperand(1)) .addReg(AMDGPU::SREG_LIT_0); BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_CNDMASK_B32)) .addOperand(MI->getOperand(0)) + .addReg(AMDGPU::VCC) .addOperand(MI->getOperand(2)) .addOperand(MI->getOperand(3)); |