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authorTom Stellard <[email protected]>2012-08-20 21:08:03 +0000
committerTom Stellard <[email protected]>2012-08-21 15:42:44 +0000
commit05882985757e655f5298af483c881008d45e6249 (patch)
treeac1ed3f0b9ff0f55f23e34fb7a2d0e5596f707a9 /src/gallium/drivers/radeon/R600RegisterInfo.h
parent1a25ebe3ce95a6a4aef7c844dbe95909976b68da (diff)
radeon/llvm: Add helper function for getting sub reg indices
Diffstat (limited to 'src/gallium/drivers/radeon/R600RegisterInfo.h')
-rw-r--r--src/gallium/drivers/radeon/R600RegisterInfo.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/R600RegisterInfo.h b/src/gallium/drivers/radeon/R600RegisterInfo.h
index f45995d7d8b..60f6d53b2d8 100644
--- a/src/gallium/drivers/radeon/R600RegisterInfo.h
+++ b/src/gallium/drivers/radeon/R600RegisterInfo.h
@@ -46,6 +46,10 @@ struct R600RegisterInfo : public AMDGPURegisterInfo
/// type to use in the CFGStructurizer
virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const;
+ /// getSubRegFromChannel - Return the sub reg enum value for the given
+ /// Channel (e.g. getSubRegFromChannel(0) -> AMDGPU::sel_x)
+ unsigned getSubRegFromChannel(unsigned Channel) const;
+
private:
/// getHWRegIndexGen - Generated function returns a register's encoding
unsigned getHWRegIndexGen(unsigned reg) const;