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authorTom Stellard <[email protected]>2012-05-08 11:33:05 -0400
committerTom Stellard <[email protected]>2012-05-08 15:47:46 -0400
commit8a4c25dd7e9002ab7a2821753bcae1ff6af2ca1c (patch)
treeae8937d37db47fd29e2ace1d1bc4e45b4585ca65 /src/gallium/drivers/radeon/R600RegisterInfo.cpp
parent94e797d0faed18dfa80bcce7a6d03ef369b6a820 (diff)
radeon/llvm: Use a custom inserter to lower RESERVE_REG
Diffstat (limited to 'src/gallium/drivers/radeon/R600RegisterInfo.cpp')
-rw-r--r--src/gallium/drivers/radeon/R600RegisterInfo.cpp19
1 files changed, 7 insertions, 12 deletions
diff --git a/src/gallium/drivers/radeon/R600RegisterInfo.cpp b/src/gallium/drivers/radeon/R600RegisterInfo.cpp
index 96507b104cf..29a7c7cfd46 100644
--- a/src/gallium/drivers/radeon/R600RegisterInfo.cpp
+++ b/src/gallium/drivers/radeon/R600RegisterInfo.cpp
@@ -13,6 +13,7 @@
#include "R600RegisterInfo.h"
#include "AMDGPUTargetMachine.h"
+#include "R600MachineFunctionInfo.h"
using namespace llvm;
@@ -26,6 +27,8 @@ R600RegisterInfo::R600RegisterInfo(AMDGPUTargetMachine &tm,
BitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const
{
BitVector Reserved(getNumRegs());
+ const R600MachineFunctionInfo * MFI = MF.getInfo<R600MachineFunctionInfo>();
+
Reserved.set(AMDIL::ZERO);
Reserved.set(AMDIL::HALF);
Reserved.set(AMDIL::ONE);
@@ -40,19 +43,11 @@ BitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const
Reserved.set(*I);
}
- for (MachineFunction::const_iterator BB = MF.begin(),
- BB_E = MF.end(); BB != BB_E; ++BB) {
- const MachineBasicBlock &MBB = *BB;
- for (MachineBasicBlock::const_iterator I = MBB.begin(), E = MBB.end();
- I != E; ++I) {
- const MachineInstr &MI = *I;
- if (MI.getOpcode() == AMDIL::RESERVE_REG) {
- if (!TargetRegisterInfo::isVirtualRegister(MI.getOperand(0).getReg())) {
- Reserved.set(MI.getOperand(0).getReg());
- }
- }
- }
+ for (std::vector<unsigned>::const_iterator I = MFI->ReservedRegs.begin(),
+ E = MFI->ReservedRegs.end(); I != E; ++I) {
+ Reserved.set(*I);
}
+
return Reserved;
}