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authorTom Stellard <[email protected]>2012-05-17 13:13:17 -0400
committerTom Stellard <[email protected]>2012-05-17 14:48:09 -0400
commit1fe70c6ae12e85cdb5967ba6d72fca8a9e5c3ec3 (patch)
treebb323135fba3947ed97e1b67b2dde3499f7ca083 /src/gallium/drivers/radeon/R600LowerInstructions.cpp
parent9916f2d2af18a26f32efb85aff5c11e1b998e19c (diff)
radeon/llvm: Expand fsub during ISel
Diffstat (limited to 'src/gallium/drivers/radeon/R600LowerInstructions.cpp')
-rw-r--r--src/gallium/drivers/radeon/R600LowerInstructions.cpp11
1 files changed, 0 insertions, 11 deletions
diff --git a/src/gallium/drivers/radeon/R600LowerInstructions.cpp b/src/gallium/drivers/radeon/R600LowerInstructions.cpp
index 19c3aae1e61..a5f57cc1d36 100644
--- a/src/gallium/drivers/radeon/R600LowerInstructions.cpp
+++ b/src/gallium/drivers/radeon/R600LowerInstructions.cpp
@@ -303,17 +303,6 @@ bool R600LowerInstructionsPass::runOnMachineFunction(MachineFunction &MF)
break;
}
- case AMDIL::SUB_f32:
- {
- MI.getOperand(2).addTargetFlag(MO_FLAG_NEG);
- BuildMI(MBB, I, MBB.findDebugLoc(I),
- TII->get(TII->getISAOpcode(AMDIL::ADD)))
- .addOperand(MI.getOperand(0))
- .addOperand(MI.getOperand(1))
- .addOperand(MI.getOperand(2));
- break;
- }
-
case AMDIL::ULT:
BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::SETGT_UINT))
.addOperand(MI.getOperand(0))