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authorTom Stellard <[email protected]>2012-05-31 14:03:29 -0400
committerTom Stellard <[email protected]>2012-06-01 11:28:10 -0400
commitf2781271c735fcdf94ed2dd831a7fa3a854deae5 (patch)
tree26971a256e52398a210dc56941afb1d80bdcbb96 /src/gallium/drivers/radeon/R600LowerInstructions.cpp
parent6a829a1b724ca0d960decee217d260b4de8a5463 (diff)
radeon/llvm: Remove AMDIL GLOBALLOAD* instructions
Diffstat (limited to 'src/gallium/drivers/radeon/R600LowerInstructions.cpp')
-rw-r--r--src/gallium/drivers/radeon/R600LowerInstructions.cpp24
1 files changed, 0 insertions, 24 deletions
diff --git a/src/gallium/drivers/radeon/R600LowerInstructions.cpp b/src/gallium/drivers/radeon/R600LowerInstructions.cpp
index 61fd4f6db8a..932825ac3b6 100644
--- a/src/gallium/drivers/radeon/R600LowerInstructions.cpp
+++ b/src/gallium/drivers/radeon/R600LowerInstructions.cpp
@@ -99,30 +99,6 @@ bool R600LowerInstructionsPass::runOnMachineFunction(MachineFunction &MF)
}
*/ /* XXX: This is an optimization */
- case AMDIL::GLOBALLOAD_f32:
- case AMDIL::GLOBALLOAD_i32:
- {
- MachineOperand &ptrOperand = MI.getOperand(1);
- MachineOperand &indexOperand = MI.getOperand(2);
- unsigned indexReg =
- MRI->createVirtualRegister(&AMDIL::R600_TReg32_XRegClass);
-
- /* Calculate the address with in the VTX buffer */
- calcAddress(ptrOperand, indexOperand, indexReg, MBB, I);
-
- /* Make sure the VTX_READ_eg writes to the X chan */
- MRI->setRegClass(MI.getOperand(0).getReg(),
- &AMDIL::R600_TReg32_XRegClass);
-
- /* Add the VTX_READ_eg instruction */
- BuildMI(MBB, I, MBB.findDebugLoc(I),
- TII->get(AMDIL::VTX_READ_eg))
- .addOperand(MI.getOperand(0))
- .addReg(indexReg)
- .addImm(1);
- break;
- }
-
case AMDIL::GLOBALSTORE_i32:
case AMDIL::GLOBALSTORE_f32:
{