diff options
| author | Tom Stellard <[email protected]> | 2012-05-17 07:35:15 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-05-17 14:48:09 -0400 |
| commit | 431bb79a41bd5e7402954385daea1594c3e750ab (patch) | |
| tree | e48876a246422920a8fae0fb1a8c990f83b378be /src/gallium/drivers/radeon/R600Instructions.td | |
| parent | 602913192db1beadd9cc4252ec9ec633cfe7a21b (diff) | |
radeon/llvm: Add custom SDNodes for MAX
We now lower the various intrinsics for max to SDNodes and then use
tablegen patterns to lower the SDNodes to instructions.
Diffstat (limited to 'src/gallium/drivers/radeon/R600Instructions.td')
| -rw-r--r-- | src/gallium/drivers/radeon/R600Instructions.td | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td index fda6b27dd57..ca2af739a4a 100644 --- a/src/gallium/drivers/radeon/R600Instructions.td +++ b/src/gallium/drivers/radeon/R600Instructions.td @@ -261,9 +261,8 @@ def MUL_IEEE : R600_2OP < def MAX : R600_2OP < 0x3, "MAX", - [(set R600_Reg32:$dst, (int_AMDIL_max R600_Reg32:$src0, R600_Reg32:$src1))]> { - let AMDILOp = AMDILInst.MAX_f32; -} + [(set R600_Reg32:$dst, (AMDGPUfmax R600_Reg32:$src0, R600_Reg32:$src1))] +>; def MIN : R600_2OP < 0x4, "MIN", @@ -370,7 +369,7 @@ def SUB_INT : R600_2OP < def MAX_INT : R600_2OP < 0x36, "MAX_INT", - [(set R600_Reg32:$dst, (int_AMDGPU_imax R600_Reg32:$src0, R600_Reg32:$src1))]>; + [(set R600_Reg32:$dst, (AMDGPUsmax R600_Reg32:$src0, R600_Reg32:$src1))]>; def MIN_INT : R600_2OP < 0x37, "MIN_INT", @@ -378,7 +377,7 @@ def MIN_INT : R600_2OP < def MAX_UINT : R600_2OP < 0x38, "MAX_UINT", - [(set R600_Reg32:$dst, (int_AMDGPU_umax R600_Reg32:$src0, R600_Reg32:$src1))]>; + [(set R600_Reg32:$dst, (AMDGPUsmax R600_Reg32:$src0, R600_Reg32:$src1))]>; def MIN_UINT : R600_2OP < 0x39, "MIN_UINT", |