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authorTom Stellard <[email protected]>2012-04-19 10:09:52 -0400
committerTom Stellard <[email protected]>2012-04-23 09:34:05 -0400
commit519789d7e6f32efa0e01a9fbc7374bc494d76769 (patch)
tree233e888c27625634b99e2fd87d34c2a32efad5ad /src/gallium/drivers/radeon/R600Instructions.td
parent3c0f521cbfb551bf69cc14c606dcdd20c0529589 (diff)
r600g/llvm: Let ISel handle lowering to {INSERT,EXTRACT}_SUBREG
Diffstat (limited to 'src/gallium/drivers/radeon/R600Instructions.td')
-rw-r--r--src/gallium/drivers/radeon/R600Instructions.td17
1 files changed, 10 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td
index af6b8be5190..02043fdeea5 100644
--- a/src/gallium/drivers/radeon/R600Instructions.td
+++ b/src/gallium/drivers/radeon/R600Instructions.td
@@ -863,13 +863,6 @@ let isCodeGenOnly = 1 in {
[]
>;
- def SET_CHAN : AMDGPUShaderInst <
- (outs R600_Reg128:$dst),
- (ins R600_Reg32:$src0, i32imm:$src1),
- "SET_CHAN $dst, $src0, $src1",
- []
- >;
-
def MULLIT : AMDGPUShaderInst <
(outs R600_Reg128:$dst),
(ins R600_Reg32:$src0, R600_Reg32:$src1, R600_Reg32:$src2),
@@ -930,6 +923,16 @@ def LOAD_VTX : AMDGPUShaderInst <
} //End isPseudo
+def : Extract_Element <f32, v4f32, R600_Reg128, 0, sel_x>;
+def : Extract_Element <f32, v4f32, R600_Reg128, 1, sel_y>;
+def : Extract_Element <f32, v4f32, R600_Reg128, 2, sel_z>;
+def : Extract_Element <f32, v4f32, R600_Reg128, 3, sel_w>;
+
+def : Insert_Element <f32, v4f32, R600_Reg32, R600_Reg128, 4, sel_x>;
+def : Insert_Element <f32, v4f32, R600_Reg32, R600_Reg128, 5, sel_y>;
+def : Insert_Element <f32, v4f32, R600_Reg32, R600_Reg128, 6, sel_z>;
+def : Insert_Element <f32, v4f32, R600_Reg32, R600_Reg128, 7, sel_w>;
+
include "R600ShaderPatterns.td"