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authorTom Stellard <[email protected]>2012-05-24 08:55:15 -0400
committerTom Stellard <[email protected]>2012-05-24 14:12:32 -0400
commit177b420283547e472632bc650f218ad4b0b541d5 (patch)
tree9aaf705ec77641244329e36194157d455ff3c9f6 /src/gallium/drivers/radeon/R600Instructions.td
parent9d41a401dcdfda1e3bfdabdedac239ef1d6b93e4 (diff)
radeon/llvm: Remove AMDIL bitshift instructions (SHL, SHR, USHR)
Diffstat (limited to 'src/gallium/drivers/radeon/R600Instructions.td')
-rw-r--r--src/gallium/drivers/radeon/R600Instructions.td15
1 files changed, 6 insertions, 9 deletions
diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td
index 6873fc6bdad..a2427769082 100644
--- a/src/gallium/drivers/radeon/R600Instructions.td
+++ b/src/gallium/drivers/radeon/R600Instructions.td
@@ -648,21 +648,18 @@ class LOG_IEEE_Common <bits<32> inst> : R600_1OP <
class LSHL_Common <bits<32> inst> : R600_2OP <
inst, "LSHL $dst, $src0, $src1",
- [] >{
- let AMDILOp = AMDILInst.SHL_i32;
-}
+ [(set R600_Reg32:$dst, (shl R600_Reg32:$src0, R600_Reg32:$src1))]
+>;
class LSHR_Common <bits<32> inst> : R600_2OP <
inst, "LSHR $dst, $src0, $src1",
- [] >{
- let AMDILOp = AMDILInst.USHR_i32;
-}
+ [(set R600_Reg32:$dst, (srl R600_Reg32:$src0, R600_Reg32:$src1))]
+>;
class ASHR_Common <bits<32> inst> : R600_2OP <
inst, "ASHR $dst, $src0, $src1",
- [] >{
- let AMDILOp = AMDILInst.SHR_i32;
-}
+ [(set R600_Reg32:$dst, (sra R600_Reg32:$src0, R600_Reg32:$src1))]
+>;
class MULHI_INT_Common <bits<32> inst> : R600_2OP <
inst, "MULHI_INT $dst, $src0, $src1",