diff options
| author | Tom Stellard <[email protected]> | 2012-05-25 12:53:22 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-05-25 15:40:59 -0400 |
| commit | 704eac09166aa6dc4c1aa82f8d0938c4060e51f4 (patch) | |
| tree | 4c9b9202563a964d6d6710c5ef3cca2c7c96be94 /src/gallium/drivers/radeon/R600Instructions.td | |
| parent | 4863477e22e02af046915ca2a33dbecfd0ed34b4 (diff) | |
radeon/llvm: Use a custom inserter for MASK_WRITE
Diffstat (limited to 'src/gallium/drivers/radeon/R600Instructions.td')
| -rw-r--r-- | src/gallium/drivers/radeon/R600Instructions.td | 32 |
1 files changed, 22 insertions, 10 deletions
diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td index f038736267b..2f6378d8e53 100644 --- a/src/gallium/drivers/radeon/R600Instructions.td +++ b/src/gallium/drivers/radeon/R600Instructions.td @@ -538,16 +538,6 @@ def TEX_SAMPLE_C_G : R600_TEX < [] >; -def KILP : Pat < - (int_AMDGPU_kilp), - (MASK_WRITE (KILLGT (f32 ONE), (f32 ZERO))) ->; - -def KIL : Pat < - (int_AMDGPU_kill R600_Reg32:$src0), - (MASK_WRITE (KILLGT (f32 ZERO), (f32 R600_Reg32:$src0))) ->; - /* Helper classes for common instructions */ class MUL_LIT_Common <bits<32> inst> : R600_3OP < @@ -1072,6 +1062,17 @@ def CLAMP_R600 : CLAMP <R600_Reg32>; def FABS_R600 : FABS<R600_Reg32>; def FNEG_R600 : FNEG<R600_Reg32>; +let usesCustomInserter = 1 in { + +def MASK_WRITE : AMDGPUShaderInst < + (outs), + (ins R600_Reg32:$src), + "MASK_WRITE $src", + [] +>; + +} // End usesCustomInserter = 1 + let isPseudo = 1 in { def LOAD_VTX : AMDGPUShaderInst < @@ -1088,6 +1089,17 @@ def LOAD_VTX : AMDGPUShaderInst < // ISel Patterns //===----------------------------------------------------------------------===// +// KIL Patterns +def KILP : Pat < + (int_AMDGPU_kilp), + (MASK_WRITE (KILLGT (f32 ONE), (f32 ZERO))) +>; + +def KIL : Pat < + (int_AMDGPU_kill R600_Reg32:$src0), + (MASK_WRITE (KILLGT (f32 ZERO), (f32 R600_Reg32:$src0))) +>; + // SGT Reverse args def : Pat < (selectcc (f32 R600_Reg32:$src0), R600_Reg32:$src1, FP_ONE, FP_ZERO, COND_LT), |