diff options
| author | Apostolos Bartziokas <[email protected]> | 2012-07-26 15:00:20 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-08-15 18:35:25 +0000 |
| commit | 040c2e04568e2fe9ec07167f5300a3dcdfebb04e (patch) | |
| tree | 7391df5f3db29e84a59ffa2309a71532c0149787 /src/gallium/drivers/radeon/R600InstrInfo.h | |
| parent | 3aaa209293a281e103ef71e3578fad042972e092 (diff) | |
radeon/llvm: Cleanup AMDGPUUtil.cpp
Diffstat (limited to 'src/gallium/drivers/radeon/R600InstrInfo.h')
| -rw-r--r-- | src/gallium/drivers/radeon/R600InstrInfo.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/R600InstrInfo.h b/src/gallium/drivers/radeon/R600InstrInfo.h index f6afee3a979..72ea1515086 100644 --- a/src/gallium/drivers/radeon/R600InstrInfo.h +++ b/src/gallium/drivers/radeon/R600InstrInfo.h @@ -44,6 +44,11 @@ namespace llvm { bool KillSrc) const; bool isTrig(const MachineInstr &MI) const; + bool isPlaceHolderOpcode(unsigned opcode) const; + bool isTexOp(unsigned opcode) const; + bool isReductionOp(unsigned opcode) const; + bool isCubeOp(unsigned opcode) const; + bool isFCOp(unsigned opcode) const; /// isVector - Vector instructions are instructions that must fill all /// instruction slots within an instruction group. |