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authorTom Stellard <[email protected]>2012-06-06 11:35:48 -0400
committerTom Stellard <[email protected]>2012-06-06 20:50:36 -0400
commit9c46cb23685d0b28d5b9124f6dd26f27d028ed30 (patch)
tree04f998193917fb08b0ada98b5567e0fdccb9c42b /src/gallium/drivers/radeon/R600InstrInfo.h
parent0c4b19ac63efa41242c515824301e6161aceeea5 (diff)
radeon/llvm: Fix MULLO* instructions on Cayman
On Cayman, the MULLO* instructions must fill all slots in an instruction group.
Diffstat (limited to 'src/gallium/drivers/radeon/R600InstrInfo.h')
-rw-r--r--src/gallium/drivers/radeon/R600InstrInfo.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/R600InstrInfo.h b/src/gallium/drivers/radeon/R600InstrInfo.h
index a7a65d5f3a1..f2a1098a40b 100644
--- a/src/gallium/drivers/radeon/R600InstrInfo.h
+++ b/src/gallium/drivers/radeon/R600InstrInfo.h
@@ -43,6 +43,10 @@ namespace llvm {
bool isTrig(const MachineInstr &MI) const;
+ /// isVector - Vector instructions are instructions that must fill all
+ /// instruction slots within an instruction group.
+ bool isVector(const MachineInstr &MI) const;
+
virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
int64_t Imm) const;
@@ -59,7 +63,8 @@ namespace R600_InstFlag {
REDUCTION = (1 << 2),
FC = (1 << 3),
TRIG = (1 << 4),
- OP3 = (1 << 5)
+ OP3 = (1 << 5),
+ VECTOR = (1 << 6)
};
}