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authorVadim Girlin <[email protected]>2012-05-07 12:50:25 +0400
committerVadim Girlin <[email protected]>2012-05-08 01:18:22 +0400
commite740b60845b56f9bb08ae751d80b058a27c73d5a (patch)
tree79a47b754d6ce73c36f1ba32906a42bd4bb0d9f5 /src/gallium/drivers/radeon/R600InstrInfo.cpp
parent95ed0e9b6b445c70e920d340818fc0f84d45233e (diff)
radeon/llvm: add support for AHSR/LSHR/LSHL instructions
Signed-off-by: Vadim Girlin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/R600InstrInfo.cpp')
-rw-r--r--src/gallium/drivers/radeon/R600InstrInfo.cpp12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/R600InstrInfo.cpp b/src/gallium/drivers/radeon/R600InstrInfo.cpp
index 0c7ffc4334d..ed4fcc9ad1e 100644
--- a/src/gallium/drivers/radeon/R600InstrInfo.cpp
+++ b/src/gallium/drivers/radeon/R600InstrInfo.cpp
@@ -73,10 +73,22 @@ unsigned R600InstrInfo::getISAOpcode(unsigned opcode) const
case AMDIL::MOVE_i32:
return AMDIL::MOV;
case AMDIL::SHR_i32:
+ return getASHRop();
+ case AMDIL::USHR_i32:
return getLSHRop();
}
}
+unsigned R600InstrInfo::getASHRop() const
+{
+ unsigned gen = TM.getSubtarget<AMDILSubtarget>().device()->getGeneration();
+ if (gen < AMDILDeviceInfo::HD5XXX) {
+ return AMDIL::ASHR_r600;
+ } else {
+ return AMDIL::ASHR_eg;
+ }
+}
+
unsigned R600InstrInfo::getLSHRop() const
{
unsigned gen = TM.getSubtarget<AMDILSubtarget>().device()->getGeneration();