diff options
| author | Tom Stellard <[email protected]> | 2012-05-31 14:03:29 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-06-01 11:28:10 -0400 |
| commit | f2781271c735fcdf94ed2dd831a7fa3a854deae5 (patch) | |
| tree | 26971a256e52398a210dc56941afb1d80bdcbb96 /src/gallium/drivers/radeon/R600ISelLowering.cpp | |
| parent | 6a829a1b724ca0d960decee217d260b4de8a5463 (diff) | |
radeon/llvm: Remove AMDIL GLOBALLOAD* instructions
Diffstat (limited to 'src/gallium/drivers/radeon/R600ISelLowering.cpp')
| -rw-r--r-- | src/gallium/drivers/radeon/R600ISelLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp index 2347ac73b8f..1d4747fcfbe 100644 --- a/src/gallium/drivers/radeon/R600ISelLowering.cpp +++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp @@ -226,15 +226,15 @@ void R600TargetLowering::lowerImplicitParameter(MachineInstr *MI, MachineBasicBl MachineRegisterInfo & MRI, unsigned dword_offset) const { MachineBasicBlock::iterator I = *MI; - unsigned offsetReg = MRI.createVirtualRegister(&AMDIL::R600_TReg32_XRegClass); + unsigned PtrReg = MRI.createVirtualRegister(&AMDIL::R600_TReg32_XRegClass); MRI.setRegClass(MI->getOperand(0).getReg(), &AMDIL::R600_TReg32_XRegClass); - BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDIL::MOV), offsetReg) + BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDIL::MOV), PtrReg) .addReg(AMDIL::ALU_LITERAL_X) .addImm(dword_offset * 4); - BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDIL::VTX_READ_eg)) + BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDIL::VTX_READ_PARAM_eg)) .addOperand(MI->getOperand(0)) - .addReg(offsetReg) + .addReg(PtrReg) .addImm(0); } |