diff options
| author | Tom Stellard <[email protected]> | 2012-04-19 10:09:52 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-04-23 09:34:05 -0400 |
| commit | 519789d7e6f32efa0e01a9fbc7374bc494d76769 (patch) | |
| tree | 233e888c27625634b99e2fd87d34c2a32efad5ad /src/gallium/drivers/radeon/R600ISelLowering.cpp | |
| parent | 3c0f521cbfb551bf69cc14c606dcdd20c0529589 (diff) | |
r600g/llvm: Let ISel handle lowering to {INSERT,EXTRACT}_SUBREG
Diffstat (limited to 'src/gallium/drivers/radeon/R600ISelLowering.cpp')
| -rw-r--r-- | src/gallium/drivers/radeon/R600ISelLowering.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp index 104f4c5aeb8..f92fe2641a5 100644 --- a/src/gallium/drivers/radeon/R600ISelLowering.cpp +++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp @@ -23,6 +23,11 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) : { setOperationAction(ISD::MUL, MVT::i64, Expand); // setSchedulingPreference(Sched::VLIW); + addRegisterClass(MVT::v4f32, &AMDIL::R600_Reg128RegClass); + addRegisterClass(MVT::f32, &AMDIL::R600_Reg32RegClass); + + setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Legal); + setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Legal); } MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter( |