diff options
| author | Vadim Girlin <[email protected]> | 2012-05-07 20:24:13 +0400 |
|---|---|---|
| committer | Vadim Girlin <[email protected]> | 2012-05-08 01:18:22 +0400 |
| commit | 757f471ba99446a942107fd9dba6bfbfe1652c14 (patch) | |
| tree | c6cf6ffb06861967cdac87eb69c0ef51e136c19a /src/gallium/drivers/radeon/R600ISelLowering.cpp | |
| parent | 06db74a753bb71adf5370d3f1133c43ae40aec72 (diff) | |
radeon/llvm: add support for v4i32
Signed-off-by: Vadim Girlin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/R600ISelLowering.cpp')
| -rw-r--r-- | src/gallium/drivers/radeon/R600ISelLowering.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp index f92fe2641a5..9e3b6b5958b 100644 --- a/src/gallium/drivers/radeon/R600ISelLowering.cpp +++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp @@ -25,9 +25,13 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) : // setSchedulingPreference(Sched::VLIW); addRegisterClass(MVT::v4f32, &AMDIL::R600_Reg128RegClass); addRegisterClass(MVT::f32, &AMDIL::R600_Reg32RegClass); + addRegisterClass(MVT::v4i32, &AMDIL::R600_Reg128RegClass); + addRegisterClass(MVT::i32, &AMDIL::R600_Reg32RegClass); setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Legal); setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Legal); + setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4i32, Legal); + setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Legal); } MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter( |