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authorVincent Lejeune <[email protected]>2012-09-04 16:49:25 +0200
committerVincent Lejeune <[email protected]>2012-09-04 17:44:48 +0200
commit6a85725f136862d8877dc76369c64e0c8b5ea4e6 (patch)
tree6c4378277e6653085734238d3c1d54751198387d /src/gallium/drivers/radeon/R600ISelLowering.cpp
parent73dd82061e7a5242c88b529c274784731462e039 (diff)
radeon/llvm: swap wrong OPCODE_IS_*_ZERO_* opcode and use
Reviewed-by: Tom Stellard <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/R600ISelLowering.cpp')
-rw-r--r--src/gallium/drivers/radeon/R600ISelLowering.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp
index fec9d4e257c..7c939354318 100644
--- a/src/gallium/drivers/radeon/R600ISelLowering.cpp
+++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp
@@ -207,7 +207,7 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::PRED_X))
.addReg(AMDGPU::PREDICATE_BIT)
.addOperand(MI->getOperand(1))
- .addImm(OPCODE_IS_ZERO)
+ .addImm(OPCODE_IS_NOT_ZERO)
.addImm(0); // Flags
TII->addFlag(NewMI, 1, MO_FLAG_PUSH);
BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::JUMP))
@@ -221,7 +221,7 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::PRED_X))
.addReg(AMDGPU::PREDICATE_BIT)
.addOperand(MI->getOperand(1))
- .addImm(OPCODE_IS_ZERO_INT)
+ .addImm(OPCODE_IS_NOT_ZERO_INT)
.addImm(0); // Flags
TII->addFlag(NewMI, 1, MO_FLAG_PUSH);
BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::JUMP))