diff options
| author | Tom Stellard <[email protected]> | 2012-08-23 19:28:50 +0000 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-08-23 21:54:32 +0000 |
| commit | 228a6641ccddaf24a993f827af1e97379785985a (patch) | |
| tree | c9ff0fd8f4a53f42ffce6377ddf7d06165311fb3 /src/gallium/drivers/radeon/R600ISelLowering.cpp | |
| parent | 5a1edb8655aeab17bf0d90e202fb31a1adb53498 (diff) | |
radeon/llvm: Pull changes from external version of the backend
Diffstat (limited to 'src/gallium/drivers/radeon/R600ISelLowering.cpp')
| -rw-r--r-- | src/gallium/drivers/radeon/R600ISelLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp index bf970a5e05d..f96887c0edb 100644 --- a/src/gallium/drivers/radeon/R600ISelLowering.cpp +++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp @@ -118,9 +118,9 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter( { // Convert to DWORD address unsigned NewAddr = MRI.createVirtualRegister( - AMDGPU::R600_TReg32_XRegisterClass); + &AMDGPU::R600_TReg32_XRegClass); unsigned ShiftValue = MRI.createVirtualRegister( - AMDGPU::R600_TReg32RegisterClass); + &AMDGPU::R600_TReg32RegClass); // XXX In theory, we should be able to pass ShiftValue directly to // the LSHR_eg instruction as an inline literal, but I tried doing it @@ -151,8 +151,8 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter( case AMDGPU::TXD: { - unsigned t0 = MRI.createVirtualRegister(AMDGPU::R600_Reg128RegisterClass); - unsigned t1 = MRI.createVirtualRegister(AMDGPU::R600_Reg128RegisterClass); + unsigned t0 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass); + unsigned t1 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass); BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SET_GRADIENTS_H), t0) .addOperand(MI->getOperand(3)) |