diff options
| author | Tom Stellard <[email protected]> | 2012-07-08 12:41:05 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-07-09 13:43:11 +0000 |
| commit | 76b44034b9b234d3db4012342f0fae677d4f10f6 (patch) | |
| tree | bac085be50fa71417aaf8533e614b3deacc1db4f /src/gallium/drivers/radeon/R600GenRegisterInfo.pl | |
| parent | 39323e8f792a33f4fe3028c286a1638dc16a38a4 (diff) | |
radeon/llvm: Rename namespace from AMDIL to AMDGPU
Diffstat (limited to 'src/gallium/drivers/radeon/R600GenRegisterInfo.pl')
| -rw-r--r-- | src/gallium/drivers/radeon/R600GenRegisterInfo.pl | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/gallium/drivers/radeon/R600GenRegisterInfo.pl b/src/gallium/drivers/radeon/R600GenRegisterInfo.pl index 9e7cf61428b..6bbe21c5f0a 100644 --- a/src/gallium/drivers/radeon/R600GenRegisterInfo.pl +++ b/src/gallium/drivers/radeon/R600GenRegisterInfo.pl @@ -25,11 +25,11 @@ my $TREG_MAX = TEMP_REG_COUNT - 1; print <<STRING; class R600Reg <string name> : Register<name> { - let Namespace = "AMDIL"; + let Namespace = "AMDGPU"; } class R600Reg_128<string n, list<Register> subregs> : RegisterWithSubRegs<n, subregs> { - let Namespace = "AMDIL"; + let Namespace = "AMDGPU"; let SubRegIndices = [sel_x, sel_y, sel_z, sel_w]; } @@ -70,21 +70,21 @@ def NEG_ONE : R600Reg<"-1.0">; def PV_X : R600Reg<"pv.x">; def ALU_LITERAL_X : R600Reg<"literal.x">; -def R600_CReg32 : RegisterClass <"AMDIL", [f32, i32], 32, (add +def R600_CReg32 : RegisterClass <"AMDGPU", [f32, i32], 32, (add $creg_list)>; -def R600_TReg32 : RegisterClass <"AMDIL", [f32, i32], 32, (add +def R600_TReg32 : RegisterClass <"AMDGPU", [f32, i32], 32, (add $treg_string)>; -def R600_TReg32_X : RegisterClass <"AMDIL", [f32, i32], 32, (add +def R600_TReg32_X : RegisterClass <"AMDGPU", [f32, i32], 32, (add $treg_x_string)>; -def R600_Reg32 : RegisterClass <"AMDIL", [f32, i32], 32, (add +def R600_Reg32 : RegisterClass <"AMDGPU", [f32, i32], 32, (add R600_TReg32, R600_CReg32, ZERO, HALF, ONE, ONE_INT, PV_X, ALU_LITERAL_X, NEG_ONE, NEG_HALF)>; -def R600_Reg128 : RegisterClass<"AMDIL", [v4f32, v4i32], 128, (add +def R600_Reg128 : RegisterClass<"AMDGPU", [v4f32, v4i32], 128, (add $t128_string)> { let SubRegClasses = [(R600_TReg32 sel_x, sel_y, sel_z, sel_w)]; @@ -122,7 +122,7 @@ unsigned R600RegisterInfo::getHWRegIndexGen(unsigned reg) const STRING foreach my $key (keys(%index_map)) { foreach my $reg (@{$index_map{$key}}) { - print OUTFILE " case AMDIL::$reg:\n"; + print OUTFILE " case AMDGPU::$reg:\n"; } print OUTFILE " return $key;\n\n"; } @@ -139,7 +139,7 @@ STRING foreach my $key (keys(%chan_map)) { foreach my $reg (@{$chan_map{$key}}) { - print OUTFILE " case AMDIL::$reg:\n"; + print OUTFILE " case AMDGPU::$reg:\n"; } my $val; if ($key eq 'X') { |