diff options
author | Tom Stellard <[email protected]> | 2012-09-24 16:49:43 -0400 |
---|---|---|
committer | Tom Stellard <[email protected]> | 2012-09-24 17:01:31 -0400 |
commit | 92b033a89ebd46d640ecb2592159087a87e5516e (patch) | |
tree | 92f373c1ff508ae11170c769b830d804be7996ad /src/gallium/drivers/radeon/R600Defines.h | |
parent | 24a8e0c3da65019073f89cb7248916a692707db6 (diff) |
radeon/llvm: Fix instruction encoding for r600 family GPUs
Tested-by: Michel Dänzer <[email protected]>
https://bugs.freedesktop.org/show_bug.cgi?id=55217
Diffstat (limited to 'src/gallium/drivers/radeon/R600Defines.h')
-rw-r--r-- | src/gallium/drivers/radeon/R600Defines.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/R600Defines.h b/src/gallium/drivers/radeon/R600Defines.h index 655b9844592..20c357cc15f 100644 --- a/src/gallium/drivers/radeon/R600Defines.h +++ b/src/gallium/drivers/radeon/R600Defines.h @@ -21,3 +21,15 @@ // operand. #define GET_FLAG_OPERAND_IDX(Flags) (((Flags) >> 7) & 0x3) +namespace R600_InstFlag { + enum TIF { + TRANS_ONLY = (1 << 0), + TEX = (1 << 1), + REDUCTION = (1 << 2), + FC = (1 << 3), + TRIG = (1 << 4), + OP3 = (1 << 5), + VECTOR = (1 << 6) + //FlagOperand bits 7, 8 + }; +} |