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authorTom Stellard <[email protected]>2012-07-27 17:46:40 +0000
committerTom Stellard <[email protected]>2012-07-30 20:31:56 +0000
commit9c42fb6f26bb7db1bc793f5fcc922bbae6700d74 (patch)
tree3c873e8a909b3c7331ca089f8e24739f41b29e9d /src/gallium/drivers/radeon/MCTargetDesc
parentf56dfc32134d65599159f53215713bf372c51a13 (diff)
radeon/llvm: Change the tablegen target from AMDIL to AMDGPU
Diffstat (limited to 'src/gallium/drivers/radeon/MCTargetDesc')
-rw-r--r--src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp22
1 files changed, 11 insertions, 11 deletions
diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp
index 52c5faa6930..fd35e9e17d9 100644
--- a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp
+++ b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp
@@ -19,26 +19,26 @@
using namespace llvm;
-static MCInstrInfo *createAMDILMCInstrInfo() {
+static MCInstrInfo *createAMDGPUMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
- InitAMDILMCInstrInfo(X);
+ InitAMDGPUMCInstrInfo(X);
return X;
}
-static MCRegisterInfo *createAMDILMCRegisterInfo(StringRef TT) {
+static MCRegisterInfo *createAMDGPUMCRegisterInfo(StringRef TT) {
MCRegisterInfo *X = new MCRegisterInfo();
- InitAMDILMCRegisterInfo(X, 0);
+ InitAMDGPUMCRegisterInfo(X, 0);
return X;
}
-static MCSubtargetInfo *createAMDILMCSubtargetInfo(StringRef TT, StringRef CPU,
+static MCSubtargetInfo *createAMDGPUMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) {
MCSubtargetInfo * X = new MCSubtargetInfo();
- InitAMDILMCSubtargetInfo(X, TT, CPU, FS);
+ InitAMDGPUMCSubtargetInfo(X, TT, CPU, FS);
return X;
}
-static MCCodeGenInfo *createAMDILMCCodeGenInfo(StringRef TT, Reloc::Model RM,
+static MCCodeGenInfo *createAMDGPUMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM,
CodeGenOpt::Level OL) {
MCCodeGenInfo *X = new MCCodeGenInfo();
@@ -50,12 +50,12 @@ extern "C" void LLVMInitializeAMDGPUTargetMC() {
RegisterMCAsmInfo<AMDILMCAsmInfo> Y(TheAMDGPUTarget);
- TargetRegistry::RegisterMCCodeGenInfo(TheAMDGPUTarget, createAMDILMCCodeGenInfo);
+ TargetRegistry::RegisterMCCodeGenInfo(TheAMDGPUTarget, createAMDGPUMCCodeGenInfo);
- TargetRegistry::RegisterMCInstrInfo(TheAMDGPUTarget, createAMDILMCInstrInfo);
+ TargetRegistry::RegisterMCInstrInfo(TheAMDGPUTarget, createAMDGPUMCInstrInfo);
- TargetRegistry::RegisterMCRegInfo(TheAMDGPUTarget, createAMDILMCRegisterInfo);
+ TargetRegistry::RegisterMCRegInfo(TheAMDGPUTarget, createAMDGPUMCRegisterInfo);
- TargetRegistry::RegisterMCSubtargetInfo(TheAMDGPUTarget, createAMDILMCSubtargetInfo);
+ TargetRegistry::RegisterMCSubtargetInfo(TheAMDGPUTarget, createAMDGPUMCSubtargetInfo);
}