diff options
author | Tom Stellard <[email protected]> | 2012-06-02 06:16:18 -0400 |
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committer | Tom Stellard <[email protected]> | 2012-06-06 13:46:03 -0400 |
commit | 8d53ddb375d2a82860b398bc463294373c5a62b0 (patch) | |
tree | 6e1f74d18b55702ae2176631787bee290d551df1 /src/gallium/drivers/radeon/AMDILRegisterInfo.cpp | |
parent | 17e047242e82111859eb8220369c601c79a26350 (diff) |
radeon/llvm: Remove AMDIL LOADCONST* instructions
This obsoletes the R600LowerInstruction and SIPropagateImmReads passes.
Diffstat (limited to 'src/gallium/drivers/radeon/AMDILRegisterInfo.cpp')
-rw-r--r-- | src/gallium/drivers/radeon/AMDILRegisterInfo.cpp | 42 |
1 files changed, 1 insertions, 41 deletions
diff --git a/src/gallium/drivers/radeon/AMDILRegisterInfo.cpp b/src/gallium/drivers/radeon/AMDILRegisterInfo.cpp index af2113b1526..51f6135b2fc 100644 --- a/src/gallium/drivers/radeon/AMDILRegisterInfo.cpp +++ b/src/gallium/drivers/radeon/AMDILRegisterInfo.cpp @@ -100,47 +100,7 @@ AMDILRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS) const { - assert(SPAdj == 0 && "Unexpected"); - MachineInstr &MI = *II; - MachineFunction &MF = *MI.getParent()->getParent(); - MachineFrameInfo *MFI = MF.getFrameInfo(); - unsigned int y = MI.getNumOperands(); - for (unsigned int x = 0; x < y; ++x) { - if (!MI.getOperand(x).isFI()) { - continue; - } - const AMDILInstrInfo * AMDILII = - static_cast<const AMDILInstrInfo *>(TM.getInstrInfo()); - bool def = AMDILII->isStoreInst(&MI); - int FrameIndex = MI.getOperand(x).getIndex(); - int64_t Offset = MFI->getObjectOffset(FrameIndex); - //int64_t Size = MF.getFrameInfo()->getObjectSize(FrameIndex); - // An optimization is to only use the offsets if the size - // is larger than 4, which means we are storing an array - // instead of just a pointer. If we are size 4 then we can - // just do register copies since we don't need to worry about - // indexing dynamically - MachineInstr *nMI = MF.CreateMachineInstr( - TII.get(AMDIL::LOADCONST_i32), MI.getDebugLoc()); - nMI->addOperand(MachineOperand::CreateReg(AMDIL::DFP, true)); - nMI->addOperand( - MachineOperand::CreateImm(Offset)); - MI.getParent()->insert(II, nMI); - nMI = MF.CreateMachineInstr( - TII.get(AMDIL::ADD_INT), MI.getDebugLoc()); - nMI->addOperand(MachineOperand::CreateReg(AMDIL::DFP, true)); - nMI->addOperand(MachineOperand::CreateReg(AMDIL::DFP, false)); - nMI->addOperand(MachineOperand::CreateReg(AMDIL::FP, false)); - - MI.getParent()->insert(II, nMI); - if (MI.getOperand(x).isReg() == false) { - MI.getOperand(x).ChangeToRegister( - nMI->getOperand(0).getReg(), def); - } else { - MI.getOperand(x).setReg( - nMI->getOperand(0).getReg()); - } - } + assert(!"Implement"); } void |