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authorTom Stellard <[email protected]>2012-05-08 15:37:59 -0400
committerTom Stellard <[email protected]>2012-05-08 15:47:46 -0400
commit5aaaa6a426258dc714c7346bec062795998f9986 (patch)
tree1362f721ad2722d7308069d8fc4310681cd72a8f /src/gallium/drivers/radeon/AMDILMachinePeephole.cpp
parent21ab46eae8b1156667dd35142829392701a8637d (diff)
radeon/llvm: Remove AMDILUtilityFunctions.cpp
Diffstat (limited to 'src/gallium/drivers/radeon/AMDILMachinePeephole.cpp')
-rw-r--r--src/gallium/drivers/radeon/AMDILMachinePeephole.cpp10
1 files changed, 7 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/AMDILMachinePeephole.cpp b/src/gallium/drivers/radeon/AMDILMachinePeephole.cpp
index 7ae8d60106f..5cb988785e2 100644
--- a/src/gallium/drivers/radeon/AMDILMachinePeephole.cpp
+++ b/src/gallium/drivers/radeon/AMDILMachinePeephole.cpp
@@ -9,9 +9,10 @@
#include "AMDIL.h"
+#include "AMDILInstrInfo.h"
#include "AMDILSubtarget.h"
-#include "AMDILUtilityFunctions.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Target/TargetMachine.h"
@@ -57,6 +58,8 @@ AMDILMachinePeephole::runOnMachineFunction(MachineFunction &MF)
{
bool Changed = false;
const AMDILSubtarget *STM = &TM.getSubtarget<AMDILSubtarget>();
+ const AMDILInstrInfo * AMDILII =
+ static_cast<const AMDILInstrInfo *>(TM.getInstrInfo());
for (MachineFunction::iterator MBB = MF.begin(), MBE = MF.end();
MBB != MBE; ++MBB) {
MachineBasicBlock *mb = MBB;
@@ -67,7 +70,7 @@ AMDILMachinePeephole::runOnMachineFunction(MachineFunction &MF)
name = TM.getInstrInfo()->getName(mi->getOpcode());
switch (mi->getOpcode()) {
default:
- if (isAtomicInst(TM.getInstrInfo(), mi)) {
+ if (AMDILII->isAtomicInst(mi)) {
// If we don't support the hardware accellerated address spaces,
// then the atomic needs to be transformed to the global atomic.
if (strstr(name, "_L_")
@@ -87,7 +90,8 @@ AMDILMachinePeephole::runOnMachineFunction(MachineFunction &MF)
TM.getInstrInfo()->get(
(mi->getOpcode() - AMDIL::ATOM_R_ADD) + AMDIL::ATOM_G_ADD));
}
- } else if ((isLoadInst(TM.getInstrInfo(), mi) || isStoreInst(TM.getInstrInfo(), mi)) && isVolatileInst(TM.getInstrInfo(), mi)) {
+ } else if ((AMDILII->isLoadInst(mi) || AMDILII->isStoreInst(mi))
+ && AMDILII->isVolatileInst(mi)) {
insertFence(MIB);
}
continue;