diff options
| author | Tom Stellard <[email protected]> | 2012-05-23 14:48:36 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-05-24 14:12:31 -0400 |
| commit | 1404e6b9fcc6ff4f962cafa8d81226dff5fef54d (patch) | |
| tree | 6b95f8c77c2aca771f75f490e46f61e2a597bcd3 /src/gallium/drivers/radeon/AMDILInstructions.td | |
| parent | 3059c075a73aa275cc43cf72ba87d64f6d748cd6 (diff) | |
radeon/llvm: Remove AMDIL binary instrutions (OR, AND, XOR, NOT)
Diffstat (limited to 'src/gallium/drivers/radeon/AMDILInstructions.td')
| -rw-r--r-- | src/gallium/drivers/radeon/AMDILInstructions.td | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeon/AMDILInstructions.td b/src/gallium/drivers/radeon/AMDILInstructions.td index 1e8ed3ddf20..bd37ff0d195 100644 --- a/src/gallium/drivers/radeon/AMDILInstructions.td +++ b/src/gallium/drivers/radeon/AMDILInstructions.td @@ -14,11 +14,6 @@ let isReMaterializable = 1, isAsCheapAsAMove = 1 in { defm MOVE : UnaryOpMC<IL_OP_MOV, IL_mov>; defm PHIMOVE : UnaryOpMC<IL_OP_MOV, IL_phimov>; } -defm BINARY_NOT : UnaryOpMC<IL_OP_I_NOT, IL_not>; -defm BINARY_OR : BinaryOpMC<IL_OP_I_OR, IL_or>; -defm BINARY_AND : BinaryOpMC<IL_OP_AND, IL_and>; -defm BINARY_XOR : BinaryOpMC<IL_OP_I_XOR, IL_xor>; -defm AND : BinaryOpMCInt<IL_OP_AND, and>; defm CMOV : BinaryOpMC<IL_OP_CMOV, IL_cmov>; defm DIV_INF : BinaryOpMC<IL_OP_DIV_INF, IL_div_inf>; defm SMAX : BinaryOpMCInt<IL_OP_I_MAX, IL_smax>; @@ -63,7 +58,6 @@ defm SHR : BinaryOpMCi32Const<IL_OP_I_SHR, sra>; defm SHLVEC : BinaryOpMCi32<IL_OP_I_SHL, shl>; defm SHRVEC : BinaryOpMCi32<IL_OP_I_SHR, sra>; defm ADD : BinaryOpMCi32<IL_OP_I_ADD, add>; -defm CUSTOM_XOR : BinaryOpMCInt<IL_OP_I_XOR, xor>; // get rid of the addri via the tablegen instead of custom lowered instruction defm CUSTOM_ADD : BinaryOpMCi32<IL_OP_I_ADD, IL_add>; defm EADD : BinaryOpMCi32<IL_OP_I_ADD, adde>; |