diff options
| author | Tom Stellard <[email protected]> | 2012-05-24 09:01:33 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-05-24 14:12:32 -0400 |
| commit | 662ccbfc21a650e0a52f6d293fa33f9e23e654c6 (patch) | |
| tree | 54d07178208a04b78c5f4a45e243af46ace1d113 /src/gallium/drivers/radeon/AMDILInstructions.td | |
| parent | 177b420283547e472632bc650f218ad4b0b541d5 (diff) | |
radeon/llvm: Remove AMDIL instructions MULHI, SMUL
Diffstat (limited to 'src/gallium/drivers/radeon/AMDILInstructions.td')
| -rw-r--r-- | src/gallium/drivers/radeon/AMDILInstructions.td | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/AMDILInstructions.td b/src/gallium/drivers/radeon/AMDILInstructions.td index cb31bddf11e..4907cc53561 100644 --- a/src/gallium/drivers/radeon/AMDILInstructions.td +++ b/src/gallium/drivers/radeon/AMDILInstructions.td @@ -51,8 +51,6 @@ def INTTOANY_i16: OneInOneOut<IL_OP_MOV, (outs GPRI16:$dst), (ins GPRI32:$src0), // Signed 32bit integer math instructions start here //===---------------------------------------------------------------------===// defm NEGATE : UnaryOpMCi32<IL_OP_I_NEGATE, IL_inegate>; -defm SMUL : BinaryOpMCi32<IL_OP_I_MUL, mul>; -defm SMULHI : BinaryOpMCi32<IL_OP_I_MUL_HIGH, mulhs>; // get rid of the addri via the tablegen instead of custom lowered instruction defm EADD : BinaryOpMCi32<IL_OP_I_ADD, adde>; def INTTOANY_i32: OneInOneOut<IL_OP_MOV, (outs GPRI32:$dst), (ins GPRI32:$src0), @@ -113,7 +111,6 @@ def FTOV4U8_i32 : OneInOneOut<IL_OP_F2U4, (outs GPRI32:$dst), // Unsigned 32bit integer math instructions start here //===---------------------------------------------------------------------===// defm UMUL : BinaryOpMCi32<IL_OP_U_MUL, IL_umul>; -defm UMULHI : BinaryOpMCi32<IL_OP_U_MUL_HIGH, mulhu>; defm UDIV : BinaryOpMCi32<IL_OP_U_DIV, udiv>; defm NATIVE_UDIV : BinaryIntrinsicInt<IL_OP_U_DIV, int_AMDIL_udiv>; let mayLoad=0, mayStore=0 in { |