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authorTom Stellard <[email protected]>2012-07-30 16:28:50 +0000
committerTom Stellard <[email protected]>2012-07-30 21:10:14 +0000
commitcd0949eb2869ec37b135fdff2110090008bbcff6 (patch)
tree3d5c79e394b401bda174fc6e38c13e33faccbb65 /src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp
parent2f921101c0826dc52a2c69f85c3da0f7f6e8212a (diff)
radeon/llvm: Cleanup AMDIL.h
Diffstat (limited to 'src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp')
-rw-r--r--src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp b/src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp
index 0592c1209d9..58a6ed2d9d8 100644
--- a/src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp
+++ b/src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp
@@ -38,7 +38,7 @@ class AMDGPUDAGToDAGISel : public SelectionDAGISel {
// make the right decision when generating code for different targets.
const AMDGPUSubtarget &Subtarget;
public:
- AMDGPUDAGToDAGISel(TargetMachine &TM AMDIL_OPT_LEVEL_DECL);
+ AMDGPUDAGToDAGISel(TargetMachine &TM);
virtual ~AMDGPUDAGToDAGISel();
SDNode *Select(SDNode *N);
@@ -80,13 +80,13 @@ private:
// DAG, ready for instruction scheduling.
//
FunctionPass *llvm::createAMDGPUISelDag(TargetMachine &TM
- AMDIL_OPT_LEVEL_DECL) {
- return new AMDGPUDAGToDAGISel(TM AMDIL_OPT_LEVEL_VAR);
+ ) {
+ return new AMDGPUDAGToDAGISel(TM);
}
AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel(TargetMachine &TM
- AMDIL_OPT_LEVEL_DECL)
- : SelectionDAGISel(TM AMDIL_OPT_LEVEL_VAR), Subtarget(TM.getSubtarget<AMDGPUSubtarget>())
+ )
+ : SelectionDAGISel(TM), Subtarget(TM.getSubtarget<AMDGPUSubtarget>())
{
}