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authorMichal Sciubidlo <[email protected]>2012-09-12 08:57:01 +0200
committerTom Stellard <[email protected]>2012-09-19 13:17:41 -0400
commit0e0c21e00ee80bcff67e37ec86b97d6c25db066a (patch)
treeb274df6453672bc6a6a6bbb836398a553d17a775 /src/gallium/drivers/radeon/AMDILBase.td
parentd525ed1a84fb889ddf380d967b3097fce298f8d4 (diff)
radeon/llvm: Emit ISA for ALU instructions in the R600 code emitter
Signed-off-by: Tom Stellard <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/AMDILBase.td')
-rw-r--r--src/gallium/drivers/radeon/AMDILBase.td5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/AMDILBase.td b/src/gallium/drivers/radeon/AMDILBase.td
index 7f72b4917f8..ffe9ce2c532 100644
--- a/src/gallium/drivers/radeon/AMDILBase.td
+++ b/src/gallium/drivers/radeon/AMDILBase.td
@@ -69,6 +69,11 @@ def FeatureDumpCode : SubtargetFeature <"DumpCode",
"true",
"Dump MachineInstrs in the CodeEmitter">;
+def FeatureR600ALUInst : SubtargetFeature<"R600ALUInst",
+ "mR600ALUInst",
+ "false",
+ "Older version of ALU instructions encoding.">;
+
//===----------------------------------------------------------------------===//
// Register File, Calling Conv, Instruction Descriptions