radeon/llvm: Cleanup AMDIL.h

1 files changed, 5 insertions, 70 deletions

diff --git a/src/gallium/drivers/radeon/AMDIL.h b/src/gallium/drivers/radeon/AMDIL.h
index 4bd47b2797f..e96b123bb7d 100644
--- a/src/gallium/drivers/radeon/AMDIL.h
+++ b/src/gallium/drivers/radeon/AMDIL.h
@@ -8,7 +8,7 @@
 //==-----------------------------------------------------------------------===//
 //
 // This file contains the entry points for global functions defined in the LLVM
-// AMDIL back-end.
+// AMDGPU back-end.
 //
 //===----------------------------------------------------------------------===//
 
@@ -18,9 +18,6 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/Target/TargetMachine.h"
 
-#define AMDIL_MAJOR_VERSION 2
-#define AMDIL_MINOR_VERSION 0
-#define AMDIL_REVISION_NUMBER 74
 #define ARENA_SEGMENT_RESERVED_UAVS 12
 #define DEFAULT_ARENA_UAV_ID 8
 #define DEFAULT_RAW_UAV_ID 7
@@ -39,26 +36,6 @@
 #define DEFAULT_SCRATCH_ID 1
 #define DEFAULT_VEC_SLOTS  8
 
-// SC->CAL version matchings.
-#define CAL_VERSION_SC_150               1700
-#define CAL_VERSION_SC_149               1700
-#define CAL_VERSION_SC_148               1525
-#define CAL_VERSION_SC_147               1525
-#define CAL_VERSION_SC_146               1525
-#define CAL_VERSION_SC_145               1451
-#define CAL_VERSION_SC_144               1451
-#define CAL_VERSION_SC_143               1441
-#define CAL_VERSION_SC_142               1441
-#define CAL_VERSION_SC_141               1420
-#define CAL_VERSION_SC_140               1400
-#define CAL_VERSION_SC_139               1387
-#define CAL_VERSION_SC_138               1387
-#define CAL_APPEND_BUFFER_SUPPORT        1340
-#define CAL_VERSION_SC_137               1331
-#define CAL_VERSION_SC_136                982
-#define CAL_VERSION_SC_135                950
-#define CAL_VERSION_GLOBAL_RETURN_BUFFER  990
-
 #define OCL_DEVICE_RV710        0x0001
 #define OCL_DEVICE_RV730        0x0002
 #define OCL_DEVICE_RV770        0x0004
@@ -76,10 +53,6 @@
 /// internal compiler usage.
 const unsigned int RESERVED_FUNCS = 1024;
 
-#define AMDIL_OPT_LEVEL_DECL
-#define  AMDIL_OPT_LEVEL_VAR
-#define AMDIL_OPT_LEVEL_VAR_NO_COMMA
-
 namespace llvm {
 class AMDGPUInstrPrinter;
 class FunctionPass;
@@ -90,17 +63,16 @@ class TargetMachine;
 
 /// Instruction selection passes.
 FunctionPass*
-  createAMDGPUISelDag(TargetMachine &TM AMDIL_OPT_LEVEL_DECL);
+  createAMDGPUISelDag(TargetMachine &TM);
 FunctionPass*
-  createAMDGPUPeepholeOpt(TargetMachine &TM AMDIL_OPT_LEVEL_DECL);
+  createAMDGPUPeepholeOpt(TargetMachine &TM);
 
 /// Pre emit passes.
 FunctionPass*
-  createAMDGPUCFGPreparationPass(TargetMachine &TM AMDIL_OPT_LEVEL_DECL);
+  createAMDGPUCFGPreparationPass(TargetMachine &TM);
 FunctionPass*
-  createAMDGPUCFGStructurizerPass(TargetMachine &TM AMDIL_OPT_LEVEL_DECL);
+  createAMDGPUCFGStructurizerPass(TargetMachine &TM);
 
-extern Target TheAMDILTarget;
 extern Target TheAMDGPUTarget;
 } // end namespace llvm;
 
@@ -128,43 +100,6 @@ enum AddressSpaces {
   LAST_ADDRESS     = 9
 };
 
-// This union/struct combination is an easy way to read out the
-// exact bits that are needed.
-typedef union ResourceRec {
-  struct {
-#ifdef __BIG_ENDIAN__
-    unsigned short isImage       : 1;  // Reserved for future use/llvm.
-    unsigned short ResourceID    : 10; // Flag to specify the resourece ID for
-                                       // the op.
-    unsigned short HardwareInst  : 1;  // Flag to specify that this instruction
-                                       // is a hardware instruction.
-    unsigned short ConflictPtr   : 1;  // Flag to specify that the pointer has a
-                                       // conflict.
-    unsigned short ByteStore     : 1;  // Flag to specify if the op is a byte
-                                       // store op.
-    unsigned short PointerPath   : 1;  // Flag to specify if the op is on the
-                                       // pointer path.
-    unsigned short CacheableRead : 1;  // Flag to specify if the read is
-                                       // cacheable.
-#else
-    unsigned short CacheableRead : 1;  // Flag to specify if the read is
-                                       // cacheable.
-    unsigned short PointerPath   : 1;  // Flag to specify if the op is on the
-                                       // pointer path.
-    unsigned short ByteStore     : 1;  // Flag to specify if the op is byte
-                                       // store op.
-    unsigned short ConflictPtr   : 1;  // Flag to specify that the pointer has
-                                       // a conflict.
-    unsigned short HardwareInst  : 1;  // Flag to specify that this instruction
-                                       // is a hardware instruction.
-    unsigned short ResourceID    : 10; // Flag to specify the resource ID for
-                                       // the op.
-    unsigned short isImage       : 1;  // Reserved for future use.
-#endif
-  } bits;
-  unsigned short u16all;
-} InstrResEnc;
-
 } // namespace AMDGPUAS
 
 } // end namespace llvm