diff options
author | Tom Stellard <[email protected]> | 2012-07-30 14:21:16 +0000 |
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committer | Tom Stellard <[email protected]> | 2012-07-30 21:10:13 +0000 |
commit | c96490e3b5ea0e369837dbb8067cf3d6b0d6b767 (patch) | |
tree | 0927467c7ee977b967f39bdd35a6e8dfe571dfcd /src/gallium/drivers/radeon/AMDIL.h | |
parent | aece7970eb171ec6c28c412d22f42362b4f52bac (diff) |
radeon/llvm: Remove IL_cmp DAG node
Diffstat (limited to 'src/gallium/drivers/radeon/AMDIL.h')
-rw-r--r-- | src/gallium/drivers/radeon/AMDIL.h | 75 |
1 files changed, 0 insertions, 75 deletions
diff --git a/src/gallium/drivers/radeon/AMDIL.h b/src/gallium/drivers/radeon/AMDIL.h index 34f32ffe37f..b446b68b46e 100644 --- a/src/gallium/drivers/radeon/AMDIL.h +++ b/src/gallium/drivers/radeon/AMDIL.h @@ -167,80 +167,5 @@ typedef union ResourceRec { } // namespace AMDILAS -// Enums corresponding to AMDIL condition codes for IL. These -// values must be kept in sync with the ones in the .td file. -namespace AMDILCC { -enum CondCodes { - // AMDIL specific condition codes. These correspond to the IL_CC_* - // in AMDILInstrInfo.td and must be kept in the same order. - IL_CC_D_EQ = 0, // DEQ instruction. - IL_CC_D_GE = 1, // DGE instruction. - IL_CC_D_LT = 2, // DLT instruction. - IL_CC_D_NE = 3, // DNE instruction. - IL_CC_F_EQ = 4, // EQ instruction. - IL_CC_F_GE = 5, // GE instruction. - IL_CC_F_LT = 6, // LT instruction. - IL_CC_F_NE = 7, // NE instruction. - IL_CC_I_EQ = 8, // IEQ instruction. - IL_CC_I_GE = 9, // IGE instruction. - IL_CC_I_LT = 10, // ILT instruction. - IL_CC_I_NE = 11, // INE instruction. - IL_CC_U_GE = 12, // UGE instruction. - IL_CC_U_LT = 13, // ULE instruction. - // Pseudo IL Comparison instructions here. - IL_CC_F_GT = 14, // GT instruction. - IL_CC_U_GT = 15, - IL_CC_I_GT = 16, - IL_CC_D_GT = 17, - IL_CC_F_LE = 18, // LE instruction - IL_CC_U_LE = 19, - IL_CC_I_LE = 20, - IL_CC_D_LE = 21, - IL_CC_F_UNE = 22, - IL_CC_F_UEQ = 23, - IL_CC_F_ULT = 24, - IL_CC_F_UGT = 25, - IL_CC_F_ULE = 26, - IL_CC_F_UGE = 27, - IL_CC_F_ONE = 28, - IL_CC_F_OEQ = 29, - IL_CC_F_OLT = 30, - IL_CC_F_OGT = 31, - IL_CC_F_OLE = 32, - IL_CC_F_OGE = 33, - IL_CC_D_UNE = 34, - IL_CC_D_UEQ = 35, - IL_CC_D_ULT = 36, - IL_CC_D_UGT = 37, - IL_CC_D_ULE = 38, - IL_CC_D_UGE = 39, - IL_CC_D_ONE = 40, - IL_CC_D_OEQ = 41, - IL_CC_D_OLT = 42, - IL_CC_D_OGT = 43, - IL_CC_D_OLE = 44, - IL_CC_D_OGE = 45, - IL_CC_U_EQ = 46, - IL_CC_U_NE = 47, - IL_CC_F_O = 48, - IL_CC_D_O = 49, - IL_CC_F_UO = 50, - IL_CC_D_UO = 51, - IL_CC_L_LE = 52, - IL_CC_L_GE = 53, - IL_CC_L_EQ = 54, - IL_CC_L_NE = 55, - IL_CC_L_LT = 56, - IL_CC_L_GT = 57, - IL_CC_UL_LE = 58, - IL_CC_UL_GE = 59, - IL_CC_UL_EQ = 60, - IL_CC_UL_NE = 61, - IL_CC_UL_LT = 62, - IL_CC_UL_GT = 63, - COND_ERROR = 64 -}; - -} // end namespace AMDILCC } // end namespace llvm #endif // AMDIL_H_ |