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authorTom Stellard <[email protected]>2012-05-08 13:08:29 -0400
committerTom Stellard <[email protected]>2012-05-08 15:47:46 -0400
commita8d82c44f79e27d2b78458f9ea560c73eef3d3b5 (patch)
tree8ccab60297b2cb83e80eba498a0e048a325311f7 /src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
parent8a4c25dd7e9002ab7a2821753bcae1ff6af2ca1c (diff)
radeon/llvm: Remove the EXPORT_REG instruction
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp')
-rw-r--r--src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
index 4f650dbaa46..5621d58e0d3 100644
--- a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
@@ -128,7 +128,6 @@ bool AMDGPUPassConfig::addPreRegAlloc() {
const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
if (ST.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
- PM->add(createR600LowerShaderInstructionsPass(*TM));
PM->add(createR600LowerInstructionsPass(*TM));
} else {
PM->add(createSILowerShaderInstructionsPass(*TM));