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authorTom Stellard <[email protected]>2012-08-20 21:09:00 +0000
committerTom Stellard <[email protected]>2012-08-21 15:42:44 +0000
commit82a5d0c64142990236b40567561b6e99b7158216 (patch)
tree5f37e5c5f4702b44eacb10c98fe1495f60a074dd /src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
parent05882985757e655f5298af483c881008d45e6249 (diff)
radeon/llvm: Add R600ExpandSpecialInstrs pass
This pass expends reduction instructions into a MachineInstrBundle that contains 4 instruction, one for each instruction slot.
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp')
-rw-r--r--src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
index b97c0febfc4..6f15430bd53 100644
--- a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
@@ -158,6 +158,12 @@ bool AMDGPUPassConfig::addPreEmitPass() {
PM->add(createAMDGPUCFGPreparationPass(*TM));
PM->add(createAMDGPUCFGStructurizerPass(*TM));
+ const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
+ if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
+ PM->add(createR600ExpandSpecialInstrsPass(*TM));
+ addPass(FinalizeMachineBundlesID);
+ }
+
return false;
}