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authorTom Stellard <[email protected]>2012-06-02 07:09:16 -0400
committerTom Stellard <[email protected]>2012-06-06 13:46:03 -0400
commitde7366701d21842787d65320c12e6b4ecaea3807 (patch)
treee94abc226845cfd686127b202106887c2b0f2c7f /src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
parent8d53ddb375d2a82860b398bc463294373c5a62b0 (diff)
radeon/llvm: Remove AMDIL VCREATE* instructions
This obsoletes the AMDGPULowerInstruction pass.
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp')
-rw-r--r--src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
index b4d2a2f5ea1..c6a2412f970 100644
--- a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
@@ -138,7 +138,6 @@ bool AMDGPUPassConfig::addPreRegAlloc() {
if (ST.device()->getGeneration() > AMDILDeviceInfo::HD6XXX) {
PM->add(createSIAssignInterpRegsPass(*TM));
}
- PM->add(createAMDGPULowerInstructionsPass(*TM));
PM->add(createAMDGPUConvertToISAPass(*TM));
return false;
}