diff options
| author | Tom Stellard <[email protected]> | 2012-04-19 10:14:41 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-04-23 09:34:05 -0400 |
| commit | f5fc3ac284eb8312e8076a5a9d47a5c082ebb537 (patch) | |
| tree | c5ff2f94adfe77a5344cee421b5a1e60783548f0 /src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp | |
| parent | 519789d7e6f32efa0e01a9fbc7374bc494d76769 (diff) | |
radeon/llvm: Lower VCREATE_v4f32 for R600 and SI
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp')
| -rw-r--r-- | src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp index 4d6a1bd7e34..328589cc143 100644 --- a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp +++ b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp @@ -152,8 +152,8 @@ bool AMDGPUPassConfig::addPreRegAlloc() { } else { PM.add(createSILowerShaderInstructionsPass(*TM)); PM.add(createSIAssignInterpRegsPass(*TM)); - PM.add(createSIConvertToISAPass(*TM)); } + PM.add(createAMDGPULowerInstructionsPass(*TM)); PM.add(createAMDGPUConvertToISAPass(*TM)); return false; } |