diff options
| author | Tom Stellard <[email protected]> | 2012-05-08 11:33:05 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-05-08 15:47:46 -0400 |
| commit | 8a4c25dd7e9002ab7a2821753bcae1ff6af2ca1c (patch) | |
| tree | ae8937d37db47fd29e2ace1d1bc4e45b4585ca65 /src/gallium/drivers/radeon/AMDGPUIntrinsics.td | |
| parent | 94e797d0faed18dfa80bcce7a6d03ef369b6a820 (diff) | |
radeon/llvm: Use a custom inserter to lower RESERVE_REG
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUIntrinsics.td')
| -rw-r--r-- | src/gallium/drivers/radeon/AMDGPUIntrinsics.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUIntrinsics.td b/src/gallium/drivers/radeon/AMDGPUIntrinsics.td index 089d3b66f61..09bddb58e17 100644 --- a/src/gallium/drivers/radeon/AMDGPUIntrinsics.td +++ b/src/gallium/drivers/radeon/AMDGPUIntrinsics.td @@ -16,7 +16,7 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in { def int_AMDGPU_export_reg : Intrinsic<[], [llvm_float_ty], []>; def int_AMDGPU_load_const : Intrinsic<[llvm_float_ty], [llvm_i32_ty], []>; def int_AMDGPU_load_imm : Intrinsic<[llvm_v4f32_ty], [llvm_i32_ty], []>; - def int_AMDGPU_reserve_reg : Intrinsic<[llvm_float_ty], [llvm_i32_ty], []>; + def int_AMDGPU_reserve_reg : Intrinsic<[], [llvm_i32_ty], []>; def int_AMDGPU_store_output : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_i32_ty], []>; def int_AMDGPU_swizzle : Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty], []>; |