diff options
| author | Tom Stellard <[email protected]> | 2012-05-24 09:28:44 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-05-24 14:12:32 -0400 |
| commit | d088da917bb3495491b9a5da5ca1716ddd91ddd5 (patch) | |
| tree | 04e6db13a10f4eea63067429781fcb398cc0d915 /src/gallium/drivers/radeon/AMDGPUInstructions.td | |
| parent | 662ccbfc21a650e0a52f6d293fa33f9e23e654c6 (diff) | |
radeon/llvm: Remove auto-generated AMDIL->ISA conversion code
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUInstructions.td')
| -rw-r--r-- | src/gallium/drivers/radeon/AMDGPUInstructions.td | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUInstructions.td b/src/gallium/drivers/radeon/AMDGPUInstructions.td index f689356e488..291081fef43 100644 --- a/src/gallium/drivers/radeon/AMDGPUInstructions.td +++ b/src/gallium/drivers/radeon/AMDGPUInstructions.td @@ -12,8 +12,6 @@ // //===----------------------------------------------------------------------===// -include "AMDGPUInstrEnums.td" - class AMDGPUInst <dag outs, dag ins, string asm, list<dag> pattern> : Instruction { field bits<16> AMDILOp = 0; field bits<3> Gen = 0; @@ -34,6 +32,13 @@ class AMDGPUShaderInst <dag outs, dag ins, string asm, list<dag> pattern> } +class Constants { +int TWO_PI = 0x40c90fdb; +int PI = 0x40490fdb; +int TWO_PI_INV = 0x3e22f983; +} +def CONST : Constants; + let isCodeGenOnly = 1 in { def MASK_WRITE : AMDGPUShaderInst < |